Xilinx Dynamic Reconfiguration

johnson.miller

Have you heard about "Xilinx Dynamic Reconfiguration" and how we can implement it?

cyberanzal

Xilinx Reconfiguration flows (Partial Reconfiguration - static & Dynamic) was a revolutionary break through in the FPGA arena. You can change the configuration of a particular area of your FPGA while the other parts are operating live. This has a lot of benefits including quick programming, device utilization reduction,..... Anyway, to use this feature, you have to obtain a PR license from xilinx. Then the PR features will be activated in your tools. You have to use the PlanAhead tool for the PR floor planning and design run. You can generate partial BIT files and you can program with that. The full features of this flow is beyond the scope of this post. You have to look into it deeply. Anyway all the best.