Writing Testbenches: Functional Verification of HDL Models -Second Edition

wadezhu

Writing Testbenches: Functional Verification of HDL Models -Second Edition


Take a survey of the books about Verilog or VHDL currently avail-
able. You will notice that the majority of the pages are devoted to
explaining the details of the languages. In addition, several chapters
are focused on the synthesizeable—or RTL—coding style replete
with examples. Some books are even devoted entirely to the subject
of RTL coding.
When verification is addressed, only one or two chapters are dedi-
cated to the topic. And often, the primary focus is to introduce more
language constructs. Verification is usually presented in a very rudi-
mentary fashion, using simple, non-scalable techniques that
become tedious in large-scale, real-life designs.

glenchan

谢谢！
不过这个从扫描版转过来的文字版版，还是有很多错误和格式问题，特别是有些代码例子不太好看。

sea19150734

Thanks for sharing!

superrabbit

感觉有点问题！

superrabbit

转换的时候有些错误，尤其是图表部分！

anshmily

转换的还是算了，效率不高的说

liuzhao87

经典啊   希望很清晰

xinxin2011

先下了再说，希望有用

dennis_zhang

第二版？？

flmwdz

好东西啊。。。做验证的必不可少的东西