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楼主: 坐对群山青

Mentor Graphics Hyperlinx SI-PI v8.0 with crack

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发表于 2010-1-5 00:35:30 | 显示全部楼层
Decoupling Analysis
Decoupling capacitors are often placed using “rules of thumb” that may have been
defined when there was just one voltage (or at most, just a few) and significantly slower
switching speeds. HyperLynx PI now allows for precise determination of the number,
location, and capacitance of each bypass cap.
发表于 2010-1-5 00:37:28 | 显示全部楼层
The entire decoupling network is extracted and graphically presented as an impedance
profile. Automatically included are the effects of capacitor mounting inductance, plane
inductance, dielectric effects, and metal losses. Capacitors can be modeled several ways:
with simple C-ESL-ESR, SPICE, or S-parameters.
As illustrated below, the entire bypass analysis is wizard-driven, producing accurate
results quickly and efficiently.
发表于 2010-1-5 00:39:53 | 显示全部楼层
Bypass Analysis
Bypass analysis is very similar to decoupling analysis. However, instead of an impedance
profile, bypass analysis shows the input impedance viewed from the location of signal
vias. HyperLynx PI presents Z-parameter data, facilitating understanding the impedance
effects. Or, the user can view S-parameters to understand loss effects, as shown below.
发表于 2010-1-5 00:41:46 | 显示全部楼层
Improved Differential-Via Modeling
Differential-via modeling is enhanced in this release of HyperLynx. The new model
includes common-mode effects, which are very important for differential signals
with skew, or other problems that cause common-mode conversion.
发表于 2010-1-5 00:42:53 | 显示全部楼层
HyperLynx SI Enhancements
HyperLynx 8.0 introduces new signal integrity enhancements. These include
transmission line model improvements, S-Parameter enhancements, improvements to
Fast Eye Simulation — including a new wizard environment for Fast Eye Diagrams,
improved differential-via modeling, and a SERDES Design Kit Configurator.
发表于 2010-1-5 00:44:45 | 显示全部楼层
Improved Support of Advanced-Memory
Interfaces (DDR2/3)
Signal Integrity capabilities for support of advanced DDR, DDR2, and DDR3 devices are
enhanced and made easier to use than even prior versions. The features are described in
this section. Wizards now make using these devices quick and reasonably simple.
This new support feature analyzes timing for both address and data buses. HyperLynx
can produce measurements for clock-to-strobe skew, timing and signal integrity on all
signal edges, and offers advanced crosstalk simulation.
发表于 2010-1-5 00:45:51 | 显示全部楼层
Improved Support of Advanced-Memory
Interfaces (DDR2/3)
Signal Integrity capabilities for support of advanced DDR, DDR2, and DDR3 devices are
enhanced and made easier to use than even prior versions. The features are described in
this section. Wizards now make using these devices quick and reasonably simple.
This new support feature analyzes timing for both address and data buses. HyperLynx
can produce measurements for clock-to-strobe skew, timing and signal integrity on all
signal edges, and offers advanced crosstalk simulation.
发表于 2010-1-5 00:47:49 | 显示全部楼层
DDR Wizard
The new wizard allows exceptionally quick setup of simulations, saving time and
allowing many more simulations (and thus better accuracy) than other simulators.
Parameters are easily set with sliders and menus. Associations are set up for clocks and
address/control signals. Stimulus can be set by per-pin or per-net to support timing
offsets. Read and write operations are configurable to eliminate wasted non-meaningful
results. And, configurations can be saved to allow almost instant re-simulation using the
same parameters.
发表于 2010-1-5 00:49:30 | 显示全部楼层
DDR2/DDR3 Wizard
The wizard also supports DDR3 timing alignment for clock and strobe signals, which is
required for the new fly-by architecture. This provides comprehensive reports of timing
results, including full timing and SI analysis with pass/fail for setup and hold times. Also
included is DT de-rating for setup and hold times. The new function provides analysis for
both data (source synchronous) and address/control signals (common clock).
发表于 2010-1-5 00:51:07 | 显示全部楼层
Upgraded IBIS-Keyword Support
Enhanced support for IBIS keywords is critical to advanced-memory simulation for
receiver thresholds and model specifications. This data is automaticically used for batchmode
simulation, and the measurements are made available in an interactive oscilloscope.
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