Springer 2009年新书《Hardware Software Co-Design of a Multimedia SOC Platform》

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新书《Hardware Software Co-Design of a Multimedia SOC Platform》
目录如下
1 Introduction .................................................... 1
2 Design Consideration ............................................ 5
2.1 Platform-BasedDesign....................................... 5
2.1.1 OMAP .............................................. 8
2.2 SystemModeling............................................ 10
2.2.1 State-Oriented Models . ................................ 11
2.2.2 Activity-Oriented Models . . ............................ 12
2.3 VideoCoding............................................... 15
2.3.1 H.264 Coding Process . ................................ 17
2.3.2 MotionEstimation .................................... 17
2.3.3 IntraPrediction....................................... 22
2.3.4 TransformandQuantization ............................ 24
2.3.5 De-Blocking Filter . . . . ................................ 26
2.3.6 Entropy Encoding . . . . . ................................ 27
2.4 ImageProcessing............................................ 27
2.5 Cryptography ............................................... 31
2.5.1 RSA................................................ 32
2.5.2 DES ................................................ 34
2.5.3 AES ................................................ 34
2.6 DigitalCommunication....................................... 36
2.7 Multimedia Instruction Set Design . ............................ 39
3 System Level Design ............................................ 41
3.1 AbstractionLevels........................................... 42
3.1.1 AlgorithmLevel ...................................... 42
3.1.2 ArchitectureLevel .................................... 42
3.1.3 BehaviorLevel ....................................... 44
3.2 AlgorithmLevelVerification .................................. 45
3.2.1 Algebraic Simulation . . ................................ 46
3.2.2 Algebraic Analysis . . . . ................................ 48
3.2.3 ErrorEvaluation ...................................... 48
3.3 TransactionLevelModeling................................... 52
3.4 SystemLevelDevelopmentTools .............................. 55
3.4.1 SystemC............................................. 56
3.4.2 LISA................................................ 58
4 Embedded Processor Design ...................................... 63
4.1 Specific Instruction-Set ....................................... 63
4.2 DataLevelParallelism ....................................... 64
4.2.1 SIMD............................................... 64
4.2.2 SWP-SIMD.......................................... 67
4.3 InstructionLevelParallelism .................................. 70
4.3.1 SuperScalar . . . ....................................... 70
4.3.2 VLIW............................................... 71
4.3.3 NISC ............................................... 74
4.4 ThreadLevelParallelism ..................................... 76
4.4.1 Multi-Threading . . . . . . ................................ 76
4.4.2 Multi-Processor ....................................... 77
4.4.3 MassivelyParallel..................................... 78
5 Parallel Compiler ............................................... 81
5.1 Vectorization ............................................... 81
5.1.1 Dependence Analysis . . ................................ 81
5.1.2 LoopNormalization................................... 83
5.1.3 LoopTransformation .................................. 84
5.1.4 Dependence Removal . . ................................ 84
5.1.5 Strongly Connected Components . . . ..................... 85
5.1.6 LoopDistribution ..................................... 86
5.2 Simdization................................................. 87
5.2.1 ControlFlowConversion............................... 87
5.2.2 MemoryAlignment ................................... 88
5.2.3 PermutationOptimization .............................. 89
5.2.4 Subword Fusion . . . . . . ................................ 90
5.2.5 MatrixTranspose ..................................... 90
5.2.6 Reduction. ........................................... 90
5.2.7 Loop Unrolling ....................................... 91
5.3 ILP Scheduling . . . ........................................... 92
5.3.1 SoftwarePipelining ................................... 92
5.3.2 BasicBlockExtension................................. 93
5.3.3 Speculation . . . ....................................... 93
5.4 Threading .................................................. 94
5.4.1 ProfilingandAnalysis ................................. 94
5.4.2 Pthread.............................................. 95
5.4.3 Structuring........................................... 97
5.4.4 OpenMP. . ........................................... 99
5.5 Compiler Technique . . .......................................100
5.5.1 LexicalAnalysis ......................................100
5.5.2 Syntax Analysis . . . . . . ................................101
5.5.3 Abstract Syntax . . . . . . . ................................102
5.5.4 SemanticAnalysis ....................................103
5.5.5 Symbol-Table Management . ............................104
5.5.6 IntermediateRepresentation ............................104
5.5.7 CodeOptimization ....................................105
5.5.8 Code Generation . . . . . . ................................106
5.6 CompilerInfrastructures......................................106
5.6.1 LCCCompilerInfrastructure............................107
5.6.2 GCCCompilerInfrastructure ...........................107
5.6.3 SUIFCompilerInfrastructure ...........................109
5.6.4 IMPACTCompilerInfrastructure........................113
6 Implementation of H.264 on PLX .................................115
6.1 InstructionSetDecisionforH.264..............................115
6.2 Hardware/Software Partitioning . . . . ............................116
6.3 UntimedVirtualPrototype ....................................117
6.4 TimedSystemCModeling ....................................122
6.5 PLXChipDesign............................................127
7 Real-Time Operating System for PLX .............................129
7.1 PRRP Scheduler . . ...........................................131
7.2 Memory Management . .......................................133
7.3 Communication and Synchronization Primitives . . . . ..............134
7.4 Multimedia Applications in RTOS for PLX . .....................135
7.5 ApplicationDevelopmentEnvironment .........................136
7.5.1 Compilers ...........................................137
7.5.2 Parser, Locator, Loader, and Startup Code . . . ..............137
7.5.3 PLXPlatformSimulator ...............................139
7.6 Experimental Results . . .......................................139
8 Conclusion .....................................................145

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