pll 经典书籍集锦2

equalizer

Thank you so much!

cynthiaxixi

谢谢，绝对是经典

shikaicool

THANKS

蓝翔

想学锁相环。。

birdhappy

support!!!

liushengfu01

《CMOS PLL Synthesizers Analysis and Design》
List of Acronyms and Symbols ix
Preface xv
1 Introduction
1.1 MOTIVATION
1.2 SUMMARY OF BOOK
1.3 BOOK ORGANIZATION
2 Frequency Synthesizer for Wireless Applications
2.1 DEFINITION AND CHARACTERISTICS
2.2 PHASE NOISE AND TIMING JITTER
2.2.1 Phase noise and spurious tone 8
2.2.2 Timing jitter
2.3 IMPLEMENTATION OF FREQUENCY SYNTHESIZER
2.3.1 Direct analog frequency synthesizer 14
2.3.2 Direct digital frequency synthesizer
2.3.3 PLL-based frequency synthesizer
2.3.4 DLL-based frequency synthesizer
2.3.5 Hybrid frequency synthesizer
2.3.6 Summary and comparison of synthesizers
2.4 FREQUENCY SYNTHESIZER FOR WIRELESS TRANSCEIVERS
2.5 OTHER APPLICATIONS OF PLL AND FREQUENCY SYNTHESIZER
REFERENCES
vi CMOS PLL Synthesizers: Analysis and Design
3 PLL Frequency Synthesizer 31
3.1 PLL FREQUENCY SYNTHESIZER BASICS
3.1.1 Basic building blocks of charge-pump PLL
3.1.2 Continuous-time linear phase analysis
3.1.3 Locking time
3.1.4 Tracking and acquisition
3.2 FAST-LOCKING TECHNIQUES
3.2.1 Bandwidth gear-shifting
3.2.2 VCO pre-tuning
3.3 DISCRETE-TIME ANALYSIS AND NONLINEAR MODELING
3.3.1 z-domain transfer function and stability analysis
3.3.2 Nonlinear dynamic behavior modeling
3.4 DESIGN EXAMPLE: 2.4GHZ INTEGER-N PLL FOR BLUETOOTH
REFERENCES
4 Fractional-N PLL Synthesizer 69
4.1 FRACTIONAL-N FREQUENCY SYNTHESIZER
4.1.1 quantization noise to phase noise mapping
4.1.2 quantization noise to timing jitter mapping
4.2 A COMPARATIVE STUDY OF DIGITAL MODULATORS
4.2.1 Design considerations
4.2.2 Four types of digital modulators
4.2.3 Summary of comparative study
4.3 OTHER APPLICATIONS OF
4.3.1 Direct digital modulation
4.3.2 Frequency-to-digital conversion
4.4 MODELING AND SIMULATION OF
4.5 DESIGN EXAMPLE: 900MHz FOR GSM
REFERENCES
5 Enhanced Phase Switching Prescaler 103
5.1 PRESCALER ARCHITECTURE
5.1.1 Conventional prescaler
5.1.2 Phase switching prescaler
5.1.3 Injection-locked prescaler
5.1.4 Summary and comparison of prescalers
5.2 ENHANCED PHASE-SWITCHING PRESCALER
5.3 CIRCUIT DESIGN AND SIMULATION RESULTS
5.3.1spaced phases generation

5.3.2 8-to-1 multiplexer
5.3.3Switching control circuit
5.3.4Asynchronous frequency divider
5.4 DELAY BUDGET IN THE SWITCHING CONTROL LOOP
CMOS PLL Synthesizers: Analysis and Design vii
5.5 SPURS DUE TO NONIDEAL  PHASE SPACING
REFERENCES
6 Loop Filter With Capacitance Multiplier 127
6.1 LOOP FILTER ARCHITECTURE
6.1.1Passive loop filter
6.1.2Dual-path loop filter
6.1.3Sample-reset loop filter
6.1.4Other loop filter architectures
6.1.5Summary and comparison of loop filters
6.2LOOP FILTER AND CHARGE-PUMP NOISE MAPPING
6.3LOOP FILTER WITH CAPACITANCE MULTIPLIER
6.3.1Third-order passive loop filter
6.3.2Capacitance multiplier
6.3.3Simulation of loop filter with capacitance multiplier
6.3.4Noise consideration
7 Other Building Blocks of PLL 151
7.1 VCO
7.1.1LC-VCO
7.1.2Varactor
7.1.3Inductor
7.1.4VCO phase noise
7.1.5Layout
7.2PHASE-FREQUENCY DETECTOR
7.3CHARGE-PUMP
7.3.1Reference spur
7.3.2Charge pump architectures
7.4PROGRAMMABLE DIVIDER
7.5DIGITAL MODULATOR
7.6CHIP LAYOUT
REFERENCES
8 Prototype Measurement Results 183
8.1PRESCALER MEASUREMENT
8.2LOOP FILTER MEASUREMENT
8.3PLL MEASUREMENT
9 Conclusions
Appendix
REFERENCES

houlimin

非常感谢

zgq0901

回复 2# rocky2004


    不错，学习

zgq0901

回复 1# rocky2004


    学习学习

zdl1986

不错不错啊