在线咨询
eetop公众号 创芯大讲堂 创芯人才网
切换到宽版

EETOP 创芯网论坛 (原名:电子顶级开发网)

手机号码,快捷登录

手机号码,快捷登录

找回密码

  登录   注册  

快捷导航
搜帖子
查看: 52164|回复: 255

pll 经典书籍集锦2

[复制链接]
发表于 2009-3-27 09:41:51 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

x
锁相环圣经:Phaselock Techniques by F. M. Gardner第三版
A greatly revised and expanded account of phaselock technologyThe Third Edition of this landmark book presents new developments in the field of phaselock loops, some of which have never been published until now. Established concepts are reviewed critically and recommendations are offered for improved formulations. The work reflects the author's own research and many years of hands-on experience with phaselock loops.
Reflecting the myriad of phaselock loops that are now found in electronic devices such as televisions, computers, radios, and cell phones, the book offers readers much new material, including:
* Revised and expanded coverage of transfer functions
* Two chapters on phase noise
* Two chapters examining digital phaselock loops
* A chapter on charge-pump phaselock loops
* Expanded discussion of phase detectors and of oscillators
* A chapter on anomalous phaselocking
* A chapter on graphical aids, including Bode plots, root locus plots, and Nichols charts
As in the previous editions, the focus of the book is on underlying principles, which remain valid despite technological advances. Extensive references guide readers to additional information to help them explore particular topics in greater depth.
Phaselock Techniques, Third Edition is intended for practicing engineers, researchers, and graduate students. This critically acclaimed book has been thoroughly updated with new information and expanded for greater depth

Phaselock-Techniques Gardner.part1.rar

4.87 MB, 下载次数: 1941 , 下载积分: 资产 -3 信元, 下载支出 3 信元

Phaselock-Techniques Gardner.part2.rar

4.87 MB, 下载次数: 1199 , 下载积分: 资产 -3 信元, 下载支出 3 信元

Phaselock-Techniques Gardner.part3.rar

4.87 MB, 下载次数: 1146 , 下载积分: 资产 -3 信元, 下载支出 3 信元

 楼主| 发表于 2009-3-27 09:58:49 | 显示全部楼层

《CMOS PLL Synthesizers Analysis and Design》

《CMOS PLL Synthesizers Analysis and Design》
List of Acronyms and Symbols ix
Preface xv
1 Introduction
1.1 MOTIVATION
1.2 SUMMARY OF BOOK
1.3 BOOK ORGANIZATION
2 Frequency Synthesizer for Wireless Applications
2.1 DEFINITION AND CHARACTERISTICS
2.2 PHASE NOISE AND TIMING JITTER
2.2.1 Phase noise and spurious tone 8
2.2.2 Timing jitter
2.3 IMPLEMENTATION OF FREQUENCY SYNTHESIZER
2.3.1 Direct analog frequency synthesizer 14
2.3.2 Direct digital frequency synthesizer
2.3.3 PLL-based frequency synthesizer
2.3.4 DLL-based frequency synthesizer
2.3.5 Hybrid frequency synthesizer
2.3.6 Summary and comparison of synthesizers
2.4 FREQUENCY SYNTHESIZER FOR WIRELESS TRANSCEIVERS
2.5 OTHER APPLICATIONS OF PLL AND FREQUENCY SYNTHESIZER
REFERENCES
vi CMOS PLL Synthesizers: Analysis and Design
3 PLL Frequency Synthesizer 31
3.1 PLL FREQUENCY SYNTHESIZER BASICS
3.1.1 Basic building blocks of charge-pump PLL
3.1.2 Continuous-time linear phase analysis
3.1.3 Locking time
3.1.4 Tracking and acquisition
3.2 FAST-LOCKING TECHNIQUES
3.2.1 Bandwidth gear-shifting
3.2.2 VCO pre-tuning
3.3 DISCRETE-TIME ANALYSIS AND NONLINEAR MODELING
3.3.1 z-domain transfer function and stability analysis
3.3.2 Nonlinear dynamic behavior modeling
3.4 DESIGN EXAMPLE: 2.4GHZ INTEGER-N PLL FOR BLUETOOTH
REFERENCES
4 Fractional-N PLL Synthesizer 69
4.1 FRACTIONAL-N FREQUENCY SYNTHESIZER
4.1.1 quantization noise to phase noise mapping
4.1.2 quantization noise to timing jitter mapping
4.2 A COMPARATIVE STUDY OF DIGITAL MODULATORS
4.2.1 Design considerations
4.2.2 Four types of digital modulators
4.2.3 Summary of comparative study
4.3 OTHER APPLICATIONS OF
4.3.1 Direct digital modulation
4.3.2 Frequency-to-digital conversion
4.4 MODELING AND SIMULATION OF
4.5 DESIGN EXAMPLE: 900MHz FOR GSM
REFERENCES
5 Enhanced Phase Switching Prescaler 103
5.1 PRESCALER ARCHITECTURE
5.1.1 Conventional prescaler
5.1.2 Phase switching prescaler
5.1.3 Injection-locked prescaler
5.1.4 Summary and comparison of prescalers
5.2 ENHANCED PHASE-SWITCHING PRESCALER
5.3 CIRCUIT DESIGN AND SIMULATION RESULTS
5.3.1spaced phases generation

5.3.2 8-to-1 multiplexer
5.3.3Switching control circuit
5.3.4Asynchronous frequency divider
5.4 DELAY BUDGET IN THE SWITCHING CONTROL LOOP
CMOS PLL Synthesizers: Analysis and Design vii
5.5 SPURS DUE TO NONIDEAL  PHASE SPACING
REFERENCES
6 Loop Filter With Capacitance Multiplier 127
6.1 LOOP FILTER ARCHITECTURE
6.1.1Passive loop filter
6.1.2Dual-path loop filter
6.1.3Sample-reset loop filter
6.1.4Other loop filter architectures
6.1.5Summary and comparison of loop filters
6.2LOOP FILTER AND CHARGE-PUMP NOISE MAPPING
6.3LOOP FILTER WITH CAPACITANCE MULTIPLIER
6.3.1Third-order passive loop filter
6.3.2Capacitance multiplier
6.3.3Simulation of loop filter with capacitance multiplier
6.3.4Noise consideration
7 Other Building Blocks of PLL 151
7.1 VCO
7.1.1LC-VCO
7.1.2Varactor
7.1.3Inductor
7.1.4VCO phase noise
7.1.5Layout
7.2PHASE-FREQUENCY DETECTOR
7.3CHARGE-PUMP
7.3.1Reference spur
7.3.2Charge pump architectures
7.4PROGRAMMABLE DIVIDER
7.5DIGITAL MODULATOR
7.6CHIP LAYOUT
REFERENCES
8 Prototype Measurement Results 183
8.1PRESCALER MEASUREMENT
8.2LOOP FILTER MEASUREMENT
8.3PLL MEASUREMENT
9 Conclusions
Appendix
REFERENCES

CMOS PLL Synthesizers Analysis and Design.part1.rar

3.81 MB, 下载次数: 1382 , 下载积分: 资产 -2 信元, 下载支出 2 信元

CMOS PLL Synthesizers Analysis and Design.part2.rar

3.81 MB, 下载次数: 947 , 下载积分: 资产 -2 信元, 下载支出 2 信元

CMOS PLL Synthesizers Analysis and Design.part3.rar

2.9 MB, 下载次数: 968 , 下载积分: 资产 -2 信元, 下载支出 2 信元

 楼主| 发表于 2009-3-27 10:04:04 | 显示全部楼层

经典奉献--CMOS PLL (by P.E.Allen 2003)

CMOS PLL  一共16个Lecture,作者P.E.Allen ,写于2003。
是CMOS  PLL 设计入门的好教程!!!
Allen写的Lecture 相对简单易懂,值得学习!

所有Lecture目录:

1.CMOS PLL  Introduce
2.CMOS Technology
3.LinearPLL
4.DIGITAL PHASE LOCK LOOPS (DPLLs)
5。ALL-DIGITAL PHASE LOCK LOOPS (ADPLLs)
6。PLL DESIGN EQUATIONS AND MEASUREMENTS
7。MODULATION AND DEMODULATION USING PLLS
8。PHASE FREQUENCY DETECTORS
9。FILTERS AND CHARGE PUMPS
10。VOLTAGE-CONTROLLED OSCILLATORS
11。PHASE NOISE
12。APPLICATIONS OF PLLS AND FREQUENCY DIVISION (PRESCALERS)
13。 FREQUENCY SYNTHESIZERS – GSM EXAMPLE
14。 ALL DIGITAL FREQUENCY SYNTHESIZER
15。CLOCK AND DATA RECOVERY CIRCUITS
16。CDR EXAMPLES

pll.part1.rar

4.86 MB, 下载次数: 1465 , 下载积分: 资产 -3 信元, 下载支出 3 信元

pll.part2.rar

4.37 MB, 下载次数: 1324 , 下载积分: 资产 -3 信元, 下载支出 3 信元

发表于 2009-3-27 10:36:53 | 显示全部楼层
收下啦!!谢谢啊!
发表于 2009-3-28 08:16:54 | 显示全部楼层
:victory: :victory:
 楼主| 发表于 2009-3-31 08:49:57 | 显示全部楼层
ding
!!!
发表于 2009-4-2 08:09:49 | 显示全部楼层
谢谢!
发表于 2009-4-2 08:11:59 | 显示全部楼层
eetop
发表于 2009-4-2 08:17:38 | 显示全部楼层
eetop
发表于 2009-4-2 08:30:53 | 显示全部楼层
eetop
您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /2 下一条


小黑屋| 手机版| 关于我们| 联系我们| 在线咨询| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2024-12-22 21:29 , Processed in 0.043454 second(s), 9 queries , Gzip On, Redis On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表