PLL phase noise and jitter

needforspeed

hi,
I simulated my PLL's phase noise at behavior level and got a closed-loop pll phase noise curve. Than I tried to integrate the phase noise to get phase jitter and period jitter.
The following matlab routine is used to convert phase noise to phase jitter and period jitter:
phasejitter = sqrt(integral(fre,2*Lpll))*T/(2*pi);
periodjitter = sqrt(8*integral(fre,Lpll.*(sin(pi*fre*T)).^2)/((2*pi*f)^2));

where Lpll is the single-sideban phase nosie of the pll, the function integral is:
function integ = integral(fre,L)
% calculate integral
len=length(fre);
for n = 1:len-1
areatrape(n) = (fre(n+1)-fre(n))*(L(n+1)+L(n))/2;
end
integ = sum(areatrape);

I expect the same results of phase jitter and period jitter because the pll locked. but the results are:
phase jitter = 8.31e-11   and
period jitter = 3.27e-12
respectively.

Is there any error of my routine or my understanding of phase jitter and period jitter?
in the attached figure, the red curve is the phase noise of the PLL.

prof3

Hi there,

I think you may misunderstand phase jitter and period jitter. Why you insist they are equal when PLL locked?
Actually, period jitter only accounts the variation bewteen clock periods, while phase jitter accumulates the error of each period,depending on the recording time length, and of course, phase jitter is bigger than period always.
And since your integation is up to inf. , this is why your phase jitter is so big. When you define the integration windows(like min. freq and ,max freq.), you will get the "real" phase jitter, which you are interested and meaningful.

BTW, your equation is correct.

Hopefully you understand what I said

needforspeed

Hi, buddy,
many thanks for your reply!
I think if VCO is free running, the phase error of output would accumulate. In this case, phase jitter could be quite large. However, when PLL is locked, phase error could be corrected periodicly to assure phase of feedback clock and ref. clock are almost equal.
accroding to jitter definition on "design of ics for optical communications", absolute jitter and period jitter are equal, where I think absolute jittter is phase jitter, am i right?
By the way, I'm evaluating my PLL by a digital scope these days. I find period jitter, cycle-to-cycle jitter could be measured directly by funstions provided by the scope, but how can I measure phase jitter. Do you have any idea about this.

needforspeed

积分上限是100M，PLL带宽大概是600k。
一直没搞清楚积分上下限应该怎么取，一些文献说在interesting frequency band上积分，不明白什么叫interesting frequency band？
请赐教！

原帖由 prof3 于 2009-3-20 03:29 发表

                               
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Hi there,

I think you may misunderstand phase jitter and period jitter. Why you insist they are equal when PLL locked?
Actually, period jitter only accounts the variation bewteen clock periods, wh ...

[ 本帖最后由 needforspeed 于 2009-3-25 06:11 编辑 ]

prof3

1. Yes, phase jitter = absolute jitte (by definition) And ususally in time domain, also called TIE.

2. Pls note that the author's statement " for a phase locked oscillator, absolute jitter = Period jitter " is wrong. As a matter of fact, it is correct only  if average(T) = To as shown in above definition. However, average(T)=To requires that N=inf., which is impractical. As I told you that, without specify time of interval or time window,  talking about absolute jitter is meangingless because it is getting bigger and bigger. Back to frequency domain, that is why it is requried to specify interest band of frequency, which is usually related to different syste. E.g. for serdes PLL, 12Khz~20Mhz for OC-48.  If for ADC PLL, fL=bin 1 of a windowing FFt, fH=Nyquist.

3. For masurement Phase jitter, many agilent oscilloscope can make it( with help of EZJIT software or some companies customize it)

needforspeed

原帖由 prof3 于 2009-3-26 07:34 发表

                               
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1. Yes, phase jitter = absolute jitte (by definition) And ususally in time domain, also called TIE.

2. Pls note that the author's statement " for a phase locked oscillator, absolute jitter = Period ...

Good, finally I get the idea that phase jitter is also called TIE. This makes sense.
I was misled by Dennis's slides.
As for integration limits, where can I find information for integral limits? Plz give me some information. I found that my PLL got very bad TIE performance with a fiber channel golden PLL in which cutoff frequency is 1/1667 of bit rate. But it's qualified for DVI and PCI express application.

gdhp79

Good, thanks. I have learned also.

Hi
phasejitter = sqrt(integral(fre,2*Lpll))*T/(2*pi); 1 L" A2 R: e" n' kperiodjitter = sqrt(8*integral(fre,Lpll.*(sin(pi*fre*T)).^2)/((2*pi*f)^2));
  a1 g' V- \. n% I3 W0 Y  wh


where does the formular come?

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