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国庆送书系列:2008年新书专辑

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发表于 2008-9-19 11:13:46 | 显示全部楼层 |阅读模式

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这些都是2008年的新书,论坛上有的就不发了,如有重复,忘见谅,没法一一检查论坛上的书籍。
下面发书:

On-Chip Communication Architectures-System on Chip Interconnect

Author(s): Sudeep Pasricha
Publisher: Morgan Kaufmann
Date     : 2008
Pages    : 536
Format   : PDF
OCR      : Y
Quality  :
Language :
ISBN     : 012373892X
Book Description
A top-down approach for complete, practical evaluation of system communication architectures in modern VLSI systems.
Product Description
Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-chip communication architectures have been designed to support all inter-component communication in a SoC design. These communication architecture fabrics have a critical impact on the power consumption, performance, cost and design cycle time of modern SoC designs. As application complexity strains the communication backbone of SoC designs, academic and industrial R&D efforts and dollars are increasingly focused on communication architecture design.
This book is a comprehensive reference on concepts, research and trends in on-chip communication architecture design. It will provide readers with a comprehensive survey, not available elsewhere, of all current standards for on-chip communication architectures.
CHAPTER 1 Introduction
CHAPTER 2 Basic Concepts of Bus-Based Communication Architectures
CHAPTER 3 On-Chip Communication Architecture Standards
CHAPTER 4 Models for Performance Exploration
CHAPTER 5 Models for Power and Thermal Estimation
CHAPTER 6 Synthesis of On-Chip Communication Architectures
CHAPTER 7 Encoding Techniques for On-Chip Communication Architectures
CHAPTER 8 Custom Bus-Based On-Chip Communication Architecture Design
CHAPTER 9 On-Chip Communication Architecture Refinement and Interface Synthesis
CHAPTER 10 Verification and Security Issues in On-Chip Communication Architecture Design
CHAPTER 11 Physical Design Trends for Interconnects
CHAPTER 12 Networks-On-Chip
CHAPTER 13 Emerging On-Chip Interconnect Technologies
On-Chip_Communication_Architectures__System_on_Chip_Interconnect.jpg

On-Chip Communication Architectures-System on Chip Interconnect.rar

2.92 MB, 下载次数: 447 , 下载积分: 资产 -2 信元, 下载支出 2 信元

 楼主| 发表于 2008-9-19 11:23:39 | 显示全部楼层

Adaptive Techniques for Dynamic Processor Optimization Theory and Practice

Author(s): Alice Wang
Publisher: Springer
Date     : 2008
Pages    : 328
Format   : PDF
OCR      : Y
Quality  :
Language :
ISBN     : 0387764712
Product Description
This book is about various adaptive and dynamic techniques used to optimize processor power and performance.  It is based on a very successful forum at ISSCC which focused on Adaptive Techniques.  Most high performance processors and embedded processors use adaptive techniques to overcome process variation, temperature, and termal effects.  This book will look at the underlying process technology for adaptive designs and then different circuits, architecture and software that address the different aspects.  The chapters are written by both people in academia and the industry in order to show the scope of alternative practices.
Product Details
Chapter 1 Technology Challenges Motivating Adaptive Techniques
Chapter 2 Technological Boundaries of Voltage and Frequency Scaling for Power Performance Tuning
Chapter 3 Adaptive Circuit Technique for Managing Power Consumption
Chapter 4 Dynamic Adaptation Using Body Bias, Supply Voltage, and Frequency
Chapter 5 Adaptive Supply Voltage Delivery for Ultra-Dynamic Voltage Scaled Systems
Chapter 6 Dynamic Voltage Scaling with the XScale Embedded Microprocessor
Chapter 7 Sensors for Critical Path Monitoring
Chapter 8 Architectural Techniques for Adaptive Computing
Chapter 9 Variability-Aware Frequency Scaling in Multi-Clock Processors
Chapter 10 Temporal Adaptation – Asynchronicity in Processor Design
Chapter 11 Dynamic and Adaptive Techniques in SRAM Design
Chapter 12 The Challenges of Testing Adaptive Designs
Adaptive Techniques for Dynamic Processor Optimization Theory and Practice.jpg

Adaptive Techniques for Dynamic Processor Optimization Theory and Practice.part1.rar

4.77 MB, 下载次数: 346 , 下载积分: 资产 -3 信元, 下载支出 3 信元

 楼主| 发表于 2008-9-19 11:30:17 | 显示全部楼层
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4.77 MB, 下载次数: 306 , 下载积分: 资产 -3 信元, 下载支出 3 信元

 楼主| 发表于 2008-9-19 11:33:05 | 显示全部楼层
第三部分

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1.11 MB, 下载次数: 288 , 下载积分: 资产 -2 信元, 下载支出 2 信元

 楼主| 发表于 2008-9-19 11:37:04 | 显示全部楼层

Basic NEC With Broadcast Applications

Author(s): J.L. Smith
Publisher: Focal Press
Date     : 2008
Pages    : 304
Format   : PDF
OCR      : Y
Quality  :
Language :
ISBN     : 0240810732
Book Description
A complete tutorial on the use of NEC with exercises, software, real-life examples.
Product Description
Basic NEC with Broadcast Applications addresses computer modeling of MF directional broadcast antennas and illustrates the assets and liabilities of the Numerical Electromagnetic Code (NEC). The book's "how to" approach reveals the fundamentals of NEC operation, teaches broadcast applications and shows the reader how to use NEC-2 to: model non-radiating networks, verify calculations, detune unused towers, design top-loaded and skirted antennas, minimize coding by moving and duplicating structures, and much more! Complete with CD, the book is an invaluable toolkit with software necessary for the design and analysis of broadcast antenna arrays.
CHAPTER 1 The Array Adjustment Process
CHAPTER 2 NEC-2 Fundamentals
CHAPTER 3 Modeling the Radiator
CHAPTER 4 Array Geometry
CHAPTER 5 Loads, Networks, and Transmission Lines
CHAPTER 6 Calculating Base Drive Voltages
CHAPTER 7 Using Data from the Output File
CHAPTER 8 Model by Measurement
CHAPTER 9 Top-Loaded and Skirted Towers
CHAPTER 10 System Bandwidth Analysis
CHAPTER 11 Case Studies
CHAPTER 12 Supplemental Topics
Basic_NEC_with_Broadcast_Applications.jpg

Basic NEC With Broadcast Applications.rar

978.21 KB, 下载次数: 151 , 下载积分: 资产 -2 信元, 下载支出 2 信元

 楼主| 发表于 2008-9-19 11:42:42 | 显示全部楼层

Digital Television 3Th Edition

Author(s): Herve Benoit
Publisher: Focal Press; 3 edition
Date     : 2008
Pages    : 304
Format   : PDF
OCR      : Yes
Quality  :
Language : English
ISBN     : 0240520815
Digital Television is as an authoritative and complete overview that describes the technology of digital television broadcasting. It gives you a thorough technical description of the underlying principles of the DVB standard and the various steps of signal processing. Also included is a complete technical glossary of terms, abbreviations, and expressions that gives you quick reference.
Now in it's 3rd edition, Digital Television, this book is completely up-to-date with standard and new technologies including:
- DVB and DVB-S2
- IPTV
- Mobile TV DVB-H
- HDTV
- High Definition formats 1080i and 720p
- Compression including MPEG, H.264, and VC-1
1. Color television: a review of current standards
2. Digitization of video signals
3. Source coding: compression of video and audio signals
4. Source multiplexing
5. Scrambling and conditional access
6. Channel coding (forward error correction)
7. Modulation by digital signals
8. Reception of digital TV signals
9. Middleware and interoperability aspects
10. Evolution: state of the art and perspectives
Appendix A: Error detection and correction in digital transmissions
Appendix B: Spectral efficiency of cable and satellite transmissions with DVB parameters
Appendix C: The main other digital TV systems
Appendix D: The IEEE1394 high speed serial AV interconnection bus
Appendix E: The DiSEqC bus for antenna system control
Appendix F: The common interface (DVB-CI)
Appendix G: DVI and HDMI links for interconnecting digital audiovisual equipment
Appendix H: Sample chipset for DVB receivers/decoders
Digital Television Third Edition.jpg

abbr_362331551b6399a815164ac9843e551e.rar

2.29 MB, 下载次数: 339 , 下载积分: 资产 -2 信元, 下载支出 2 信元

 楼主| 发表于 2008-9-19 11:49:00 | 显示全部楼层

Discrete-Time High Order Neural Control Trained with Kalman Filtering

Author(s): Edgar N. Sanchez
Publisher: Springer
Date     : 2008
Pages    : 110
Format   : PDF
OCR      : N
Quality  :
Language :
ISBN     : 3540782885
Product Description
The objective of this work is to present recent advances in the theory of neural control for discrete-time nonlinear systems with multiple inputs and multiple outputs. The results that appear in each chapter include rigorous mathematical analyses, based on the Lyapunov approach, that guarantee its properties; in addition, for each chapter, simulation results are included to verify the successful performance of the corresponding proposed schemes. In order to complete the treatment of these schemes, the final chapter presents experimental results related to their application to a electric three phase induction motor, which show the applicability of such designs. The proposed schemes could be employed for different applications beyond the ones presented in this book.
1 Introduction
2 Mathematical Preliminaries.
3 Discrete-Time Adaptive Neural Backstepping.
4 Discrete-Time Block Control
5 Discrete-Time Neural Observers
6 Discrete-Time Output Trajectory Tracking
7 Real Time Implementation
8 Conclusions and Future Work
Discrete-Time High Order Neural Control Trained with Kalman Filtering.jpg

Discrete-Time High Order Neural Control Trained with Kalman Filtering.rar

3.48 MB, 下载次数: 199 , 下载积分: 资产 -2 信元, 下载支出 2 信元

发表于 2008-9-19 11:55:19 | 显示全部楼层
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 楼主| 发表于 2008-9-19 11:55:50 | 显示全部楼层

Fabless Semiconductor Implementation

Author(s): Rakesh Kumar
Publisher: McGraw-Hill Professional
Date     : 2008
Pages    : 336
Format   : PDF
OCR      : Y
Quality  :
Language :
ISBN     : 0071502661
Product Description
Discover How to Launch and Succeed as a Fabless Semiconductor Firm
Fabless Semiconductor Implementation takes you step-by-step through the challenges faced by fabless firms in the development of integrated circuits. This expert guide examines the potential pitfalls of IC implementation in the rapidly growing fabless segment of the semiconductor industry and elaborates how to overcome these difficulties. It provides a comprehensive overview of the issues that executives and technical professionals encounter at fabless companies.
Filled with over 150 on-target illustrations, this business-building tool presents a clear picture of the entire lifecycle of a fabless enterprise, describing how to envision and execute fabless IC implementation.
Inside This Comprehensive Guide to Fabless IC Design
# - Define and specify the product
# Understand the customer requirements, the value chain, and the supply chain
# Select the right implementation approach, including “make” vs. “buy”
# Choose the best technologies and supply chain
# Implement IC design, fabrication, and manufacturing
# Build the operations infrastructure to meet cost and quality requirements
# Program-manage the distributed supply chain
About the Author
Rakesh Kumar is a semiconductor industry veteran with extensive experience in managing IC implementation in both fabless and fab environments. He is the Founding Partner and President of TCX, Inc., a company that has assisted many fabless companies. He has held technical and executive positions at Cadence Design Services, Unisys, and Motorola. Dr. Kumar serves on the executive committees of the IEEE Solid-State Circuits Society and the IEEE Engineering Management Council.
Product Details
1 Industry Perspectives
2 The Big Picture
3 Lifecycle of a Fabless IC Company
4 Selecting the Implementation Approach
5 Selecting the Technologies
6 Implementing the COT Approach
7 Managing Cost
8 Managing Quality
9 Managing the Implementation Program
10 Future Trends
Fabless_Semiconductor_Implementation.jpg

Fabless Semiconductor Implementation.part1.rar

4.77 MB, 下载次数: 430 , 下载积分: 资产 -3 信元, 下载支出 3 信元

发表于 2008-9-19 11:58:36 | 显示全部楼层
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