Artech House2007-Phase-Locked Loops Engineering Handbook for Integrated Circuits

sathya

Design of the Nulling Resistor (M8)
In order to place the zero on top of the second pole (p2), the following relationship must hold
Rz =
1
gm6

 
  
CL + Cc
Cc
=

 
  
Cc+CL
Cc
1
2K’PS6I6
The resistor, Rz, is realized by the transistor M8 which is operating in the active region because the dc current
through it is zero. Therefore, Rz, can be written as
Rz =
dvDS8
diD8

VDS8=0
=
1
K’PS8(VSG8-|VTP|)
The bias circuit is designed so that voltage VA is equal to VB.
∴ |VGS10| − |VT| = |VGS8| − |VT| ⇒ VSG11 = VSG6 ⇒ 


  
W11
L11
=

 
  
I10
I6

 
  
W6
L6
In the saturation region
|VGS10| − |VT| =
2(I10)
K'P(W10/L10) = |VGS8| − |VT|
∴ Rz =
1
K’PS8
K’PS10
2I10
=
1
S8
S10
2K’PI10
Equating the

markhorrow

非常感谢提供！

nnltshan

谢谢分享，加油，努力

bbyan

感謝大大無私分享~

bbyan

非常感謝大大無私分享~!!

lupo

handbook

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lyneesky

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ralphtw

Artech House2007-Phase-Locked Loops Engineering Handbook for Integrated Circuits

wangeternal

感谢分享，来看看cycle slip