Ming-Dou Ker--ESD Protection Design(IEEE 2008 ,June)

semico_ljj

ESD Protection Design With On-Chip ESD Bus and
High-Voltage-Tolerant ESD Clamp Circuit for
Mixed-Voltage I/O Buffers

Ming-Dou Ker, Fellow, IEEE, and Wei-Jen Chang, Member, IEEE

IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 55, NO. 6, JUNE 2008

semico_ljj

Index Terms
          Electrostatic discharge (ESD), high-voltagetolerant
ESD clamp circuit, I/O, mixed-voltage secondary, on-chip
ESD bus, secondary breakdown current (It2) substrate-triggered
technique.

semico_ljj

Low-Capacitance and Fast Turn-on SCR for RF ESD Protection

Copyright @  2008 The Institute of Electronics, Information and Communication Engineers


SUMMARY With the smaller layout area and parasitic capacitance under
the same electrostatic discharge (ESD) robustness, silicon-controlled
rectifier (SCR) has been used as an effective on-chip ESD protection device
in radio-frequency (RF) IC. In this paper, SCR’s with the waffle layout
structures are studied to minimize the parasitic capacitance and the variation
of the parasitic capacitance within ultra-wide band (UWB) frequencies.
With the reduced parasitic capacitance and capacitance variation, the
degradation on UWB RF circuit performance can be minimized. Besides,
the fast turn-on design on the low-capacitance SCR without increasing the
I/O loading capacitance is investigated and applied to an UWB RF power
amplifier (PA). The PA co-designed with SCR in the waffle layout structure
has been fabricated. Before ESD stress, the RF performances of the ESDprotected
PA are as well as that of the unprotected PA. After ESD stress,
the unprotected PA is seriously degraded, whereas the ESD-protected PA
still keeps the performances well.
key words: electrostatic discharge (ESD), low capacitance (low-C), power
amplifier (PA), radio-frequency (RF), silicon-controlled rectifier (SCR),
waffle layout

[ 本帖最后由 semico_ljj 于 2008-8-19 21:59 编辑 ]

zhanweisu27

不断学习

超越自我

semico_ljj

…………

semico_ljj

Impact of MOSFET Gate-Oxide Reliability
on CMOS Operational Amplifier in a
130-nm Low-Voltage Process

Ming-Dou Ker, Fellow, IEEE, and Jung-Sheng Chen

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 8, NO. 2, JUNE 2008


Index Terms
       Analog circuit, dielectric breakdown, gate-oxide
reliability, MOSFETs, operational amplifier.

semico_ljj

semico_ljj

alex_bai

:victory:

belamy

非常感谢