2004Prentice Hall五星书 -Advanced Digital Design With The Verilog Hdl

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[size=120%]DJVU格式的扫描版,有需要的再下吧!
[size=120%]Advanced Digital Design With The Verilog Hdl
By CILETTI MICHAEL D

                               
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Publisher:   Prentice Hall India
Number Of Pages:   1012
Publication Date:   2004
ISBN-10 / ASIN:   812032756X
ISBN-13 / EAN:   
Binding:   Paperback

Product Description:

Behavioral modelling with a hardware description language (HDL) is the key to modern design at application-specific integrated circuits (ASICs). Readers preparing to contribute to a productive design team must know how to use an HDL at key stages of the design flow. This book goes beyond the basic principles and methods learned in a first course in digital design. The aim of the text is to build on a student's background from a first course in logic design by : 1. Reviewing basic principles of combinational and sequential logic. 2. Introducing the use of HDLs in design. 3. Emphasizing descriptive styles that will allow the reader to quickly design working circuits suitable for ASICs and/or field-programmable gate array (FPGA) implementation, and 4. Providing in-depth design examples using modern design tools. The focus of the book is on developing, verifying, and synthesizing of digital circuits, not on the Verilog language. It covers only the case and most widely used features of Verilog. The book is for students in an advanced course in digital design, and for professional engineers interested in learning Verilog by example, in the context of its use in the design flow of modern integrated circuits.

Chapter 1: Introduction to Digital Design Methodology
Chapter 2: Review of Combinational Logic Design
Chapter 3: Fundamentals of Sequential Logic Design
Chapter 4: Introduction to Logic Design with Verilog
Chapter 5: logic Design with Behavioral Models of Combinational and Sequential Logic
Chapter 6: Synthesis of Combinational and Sequential Logic
Chapter 7: Design and Synthesis of Datapath Controllers
Chapter 8: Programmable Logic and Storage Devices
Chapter 9: Algorithms and Architectures for Digital Processors
Chapter 10: Architectures for Arithmetic Processors
Chapter 11: Postsynthesis Design Tasks

[ 本帖最后由 woainio 于 2008-6-25 21:12 编辑 ]

woainio

好慢啊!终于传完了!

u571

太大了，就不下了

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goodddddd

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weixbox

thanks

weixbox

two days

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