practical ESD design giude

navyhu

from x-fab company

mscyc0909

1 INTRODUCTION............................................................................................................. 4
2 ESD TEST MODELS ....................................................................................................... 5
2.1 Human Body Model (HBM) ...................................................................................................................5
2.2 Machine Model (MM) .............................................................................................................................7
2.3 Charged Device Model (CDM) ...............................................................................................................9
2.4 Transmission Line Pulsing (TLP).........................................................................................................11
2.5 System Level ESD Tests ........................................................................................................................16
2.6 Comparisons between the Test Methods .............................................................................................18
3 ESD PROTECTION MECHANISM ............................................................................ 21
3.1 ESD Failure Mechanism......................................................................................................................21
3.2 ESD Protection Device Types ...............................................................................................................22
3.3 ESD Robust Design...............................................................................................................................23
3.4 ESD Protection Strategies.....................................................................................................................25
3.5 ESD Design Window.............................................................................................................................27
3.6 NMOS-Related ESD Issues ...................................................................................................................28
3.7 NMOS Devices and Hot-electron Interactions ....................................................................................30
3.8 ESD and HV NMOS Devices ................................................................................................................31
3.9 Antenna Rule Violations .......................................................................................................................33
4 DEVICES FOR ESD PROTECTION........................................................................... 35
4.1 Diodes.....................................................................................................................................................35
4.2 Thick Field Oxide Clamps (TFO).........................................................................................................37
4.3 Silicon-Controlled Rectifier (SCR).......................................................................................................39
4.4 Medium Voltage Triggered SCR (MVTSCR).....................................................................................40
4.5 Low Voltage Triggered SCR (LVTSCR).............................................................................................41
4.6 Grounded Gate NMOS (ggNMOS) ......................................................................................................43
4.7 Gate Coupled NMOS (gcNMOS) .........................................................................................................45
4.8 Gate Biasing Clamps .............................................................................................................................45
4.9 BJT Clamps...........................................................................................................................................47
5 INPUT ESD PROTECTION SCHEMES..................................................................... 50
5.1 Dual-Diode Based Protection Circuit...................................................................................................50
5.2 Pi-Structure Based Protection Circuit .................................................................................................53
6 OUTPUT ESD PROTECTION SCHEMES................................................................. 54
6.1 Power Rail Based Output Protection ...................................................................................................54
6.2 Pad Based Output Protection ...............................................................................................................55
6.3 Open Drain Output Design ...................................................................................................................57
7 POWER CLAMPS.......................................................................................................... 60
7.1 Diode String Power Clamp ...................................................................................................................60
7.2 NMOS Power Clamp............................................................................................................................61
7.3 SCR Power Clamp................................................................................................................................61
7.4 MOSFET Switch Based Supply Clamps..............................................................................................63
7.5 Distributed MOS Supply Clamps.........................................................................................................66
7.6 Issues Related to MOS Supply Clamps................................................................................................68
8 LATCH-UP...................................................................................................................... 69
8.1 Background on Latch-up ......................................................................................................................69
8.2 Fab/Design Approaches to Avoid Latch-up.........................................................................................71
8.3 System Level Approaches to Avoid Latch-up .....................................................................................72
8.4 Latch-up Tests.......................................................................................................................................74

milk56333

GOOD

jediai

很不错的东西啊~~~

dcircuit

GOOD

mf3780

tkscc~

jcchan

頂一下!感謝無私分享!!

未来星

3kyyyyyyyyyyyyy

lhxa_2116

hen bu cuo de dong xi

qingyunz

非常好，谢谢！