一篇关于DC-DC效率计算的IEEEpaper

katherinezhang

Abstract—A low-voltage-swing MOSFET gate drive technique
is proposed in this paper for enhancing the efficiency characteristics
of high-frequency-switching dc–dc converters. The parasitic
power dissipation of a dc–dc converter is reduced by lowering the
voltage swing of the power transistor gate drivers. A comprehensive
circuit model of the parasitic impedances of a monolithic buck
converter is presented. Closed-form expressions for the total power
dissipation of a low-swing buck converter are proposed. The effect
of reducing the MOSFET gate voltage swings is explored with
the proposed circuit model. A range of design parameters is evaluated,
permitting the development of a design space for full integration
of active and passive devices of a low-swing buck converter on
the same die, for a target CMOS technology. The optimum gate
voltage swing of a power MOSFET that maximizes efficiency is
lower than a standard full voltage swing. An efficiency of 88% at a
switching frequency of 102 MHz is achieved for a voltage conversion
from 1.8 to 0.9 V with a low-swing dc–dc converter based on a
0.18- m CMOS technology. The power dissipation of a low-swing
dc–dc converter is reduced by 27.9% as compared to a standard
full-swing dc–dc converter.

zying

thanks

dengqin

多谢多谢，下来看看

mochowliyang

多谢提供资源

luoyih

thanks

luoyih

caiee

charlie11

thanks

flyfisher

good, thanks.

lhlbluesky

不错从不错不错