如何降低Lattice CPLD 逻辑的fanin

jamyce

使用Lattice M4A3器件, 好象是fanin过大引起的问题, 请教如何降低fanin?

布线时提示:

*** End of Normalization.
<Warning>  F35510:  Block A has a logic fanin of 50 due to preplaced or
                    block-restricted signals: routing capacity is 33
                    signals.

........

<ERROR>  F38007:  *** Cannot find a Partition.
..... Only 62 percent of all signals are partitioned.
Unpartitioned Signals : sd_4_ isr_1_ isr_2_ isr_3_ isr_4_ isr_5_ isr_6_ isr_7_ isr_0_ icr_1_ icr_2_ icr_3_ icr_4_ icr_5_ icr_6_ icr_7_ icr_0_ irq_sel_1_ irq_sel_2_ irq_sel_3_ irq_sel_4_ irq_sel_5_ irq_sel_6_ irq_sel_7_ irq_sel_0_ un1_din_0_ un1_din_1_ un1_din_2_ un1_din_3_ un1_din_4_ un1_din_5_ un1_din_6_ un1_din_7_ sd_3_ sd_2_ sd_1_ chip_sel irq chip_sel_1 chip_sel_2 sd_dout20 con6 con7
Please check the number of literals.
Please check the clocks.
*** Report Generator invoked.
*** Report Generator end.
<ERROR> Fitting failure. Processing aborted.
<ERROR> ERROR count 1 WARNING count 1 .
Done: failed with exit code: 0001.

hkiser

帮你顶起来。

lszdb

帮你顶起来····

mcchan