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List of Figures
List of Tables
Preface
Acknowledgments
ix
xiii
xv
1. INTRODUCTION
1.1
1.2
1.3
Motivation
Memory Architecture Exploration for Embedded Systems
Book Organization
1
1
2
7
9
9
2. RELATED WORK
2.1
2.2
2.3
2.4
2.5
High-Level Synthesis
Cache Optimizations
Computer Architecture
Disk File Systems
Heterogeneous Memory Architectures
2.5.1 Network Processors
2.5.2 Other Memory Architecture Examples
10
11
12
13
14
15
16
17
17
18
20
22
23
23
2.6 Summary
3. EARLY MEMORY SIZE ESTIMATION
3.1
3.2
3.3
Motivation
Memory Estimation Problem
Memory Size Estimation Algorithm
3.3.1
3.3.2
3.3.3
Data-dependence analysis
Computing the memory size between loop nests
Determining the bounding rectangles
vi MEMORY ARCHITECTURE EXPLORATION
3.3.4
3.3.5
Determining the memory size range
Improving the estimation accuracy
24
25
25
27
28
29
3.4
3.5
3.6
3.7
Discussion on Parallelism vs. Memory Size
Experiments
Related Work
Summary
4. EARLY MEMORY AND CONNECTIVITY
ARCHITECTURE EXPLORATION 31
31
32
32
34
37
37
39
39
40
41
45
46
47
48
51
55
57
59
59
60
72
74
75
79
79
80
81
83
4.1
4.2
Motivation
Access Pattern Based Memory Architecture Exploration
4.2.1
4.2.2
4.2.3
Our approach
Illustrative example
The Access Pattern based Memory Exploration (APEX)
Approach
Access Pattern Clustering
Exploring Custom Memory Configurations
Experiments
Experimental Setup
Results
Related Work
4.2.3.1
4.2.3.2
4.2.4
4.2.4.1
4.2.4.2
4.2.5
4.3 Connectivity Architecture Exploration
4.3.1
4.3.2
4.3.3
Our approach
Illustrative example
Connectivity Exploration Algorithm
Cost, performance, and power models
Coupled Memory/Connectivity Exploration strategy
Experiments
Experimental Setup
Results
Related Work
4.3.3.1
4.3.3.2
4.3.4
4.3.4.1
4.3.4.2
4.3.5
4.4
4.5
Discussion on Memory Architecture
Summary and Status
5. MEMORY-AWARE COMPILATION
5.1
5.2
Motivation
Memory Timing Extraction for Efficient Access Modes
5.2.1
5.2.2
Motivating Example
Our Approach
Contents vii
5.2.3
5.2.4
TIMGEN: Timing extraction algorithm
Experiments
Experimental Setup
Results
Related Work
5.2.4.1
5.2.4.2
5.2.5
5.3 Memory Miss Traffic Management
5.3.1
5.3.2
5.3.3
Illustrative example
Miss Traffic Optimization Algorithm
Experiments
Experimental setup
Results
Related Work
5.3.3.1
5.3.3.2
5.3.4
5.4 Summary
84
89
89
90
92
94
95
98
6. EXPERIMENTS
6.1
6.2
Experimental setup
Results
6.2.1
6.2.2
6.2.3
The Compress Data Compression Application
The Li Lisp Interpreter Application
The Vocoder Voice Coding Application
101
102
102
105
107
109
109
110
110
114
116
117
119
119
120
121
127
6.3 Summary of Experiments
7. CONCLUSIONS
7.1
7.2
Summary of Contributions
Future Directions
References
Index
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