FLOATING-GATE TRANSISTOR PROPERTIES IN CIRCUIT DESIGN___Phd

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CHAPTER 1 EXISTING APPROACHES IN Analog AND MIXED-SIGNAL
CIRCUIT DESIGN . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Tunability in artificial neural network (ANN) systems . . . . . . . . . . . 2
1.2 Linearity of Highly Linear Amplifier and Multiplier Circuits . . . . . . . . 5
1.3 Design issues of digital-to-analog converters and multi-bit quantizers . . . 6
1.3.1 Binary-weighted capacitor DAC . . . . . . . . . . . . . . . . . . 7
1.3.2 Multi-bit quantizers using binary-weighted resistor DAC . . . . . 8
1.4 Tunability and reconfigurability in the implementations of the finite impulse
response filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.5 Motivation for using floating-gate transistors in analog and mixed-signal
circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CHAPTER 2 DESIGN OF TUNABLE CIRCUITS USING FLOATING-GATE
TRANSISTORS . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.1 Floating-Gate Transistor Programming . . . . . . . . . . . . . . . . . . . 14
2.2 Tunable resistor design . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.2.1 Generation and tuning of a large quiescent voltage . . . . . . . . . 17
2.2.2 Common-mode voltage computation . . . . . . . . . . . . . . . . 19
2.3 Design of a tunable voltage reference . . . . . . . . . . . . . . . . . . . . 20
2.3.1 Epot programming . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.3.2 Epot Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2.3.3 Epot temperature dependence . . . . . . . . . . . . . . . . . . . . 23
2.3.4 Epot Charge Retention . . . . . . . . . . . . . . . . . . . . . . . 24
CHAPTER 3 A TUNABLE FLOATING CMOS RESISTOR USING GATE LINEARIZATION
TECHNIQUE . . . . . . . . . . . . . . . . . . . 27
3.1 Gate Linearization Technique . . . . . . . . . . . . . . . . . . . . . . . . 27
3.2 Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.3 Temperature dependence . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.4 Experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.5 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
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CHAPTER 4 A TUNABLE FLOATING-GATE CMOS RESISTOR USING SCALEDGATE
LINEARIZATION TECHNIQUE . . . . . . . . . . . . . 37
4.1 Scaled-gate linearization technique . . . . . . . . . . . . . . . . . . . . . 38
4.2 Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
4.3 Experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
CHAPTER 5 TUNABLE HIGHLY LINEAR FLOATING-GATE CMOS RESISTOR
USING COMMON-MODE LINEARIZATION TECHNIQUE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
5.1 Common-mode Linearization Technique . . . . . . . . . . . . . . . . . . 47
5.2 Circuit Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
5.3 Experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
5.4 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
CHAPTER 6 DESIGN OF HIGHLY LINEAR AMPLIFIER ANDMULTIPLIER
CIRCUITS USING A CMOS FLOATING-GATE RESISTOR . 60
6.1 Highly Linear Amplifier Design . . . . . . . . . . . . . . . . . . . . . . . 60
6.2 Multiplier Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
6.3 Experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
CHAPTER 7 DESIGN OF A BINARY-WEIGHTED RESISTOR DAC USING
TUNABLE LINEARIZED FLOATING-GATE CMOS RESISTORS 66
7.1 Design and implementation of binary-weighted resistor DAC . . . . . . . 66
7.2 Experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
CHAPTER 8 PROGRAMMABLEVOLTAGE-OUTPUT DIGITAL-TO-ANALOG
CONVERTER . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
8.1 Traditional binary-weighted capacitor vs. proposed DAC design: BWCDAC
vs. FGDAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
8.1.1 Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
8.1.2 Speed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
8.1.3 Gain error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
8.1.4 Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
8.2 Circuit description of FGDAC . . . . . . . . . . . . . . . . . . . . . . . . 81
8.3 Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
CHAPTER 9 A RECONFIGURABLE MIXED-SIGNAL VLSI IMPLEMENTATION
OF DISTRIBUTED ARITHMETIC . . . . . . . . . . . 89
9.1 DA computation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
9.2 Proposed DA architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 91
9.3 Circuit description of computational blocks . . . . . . . . . . . . . . . . . 95
9.4 Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
9.5 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
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CHAPTER 10 IMPACTS AND APPLICATIONS OF THE PRESENTEDWORK103
10.1 Impacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
10.2 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
10.2.1 Tunable resistors . . . . . . . . . . . . . . . . . . . . . . . . . . 107
10.2.2 Epot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
10.2.3 Mixed-signal implementation of the distributed arithmetic . . . . . 107
APPENDIX A LINEARITY ANALYSIS OF GATE AND COMMON-MODE LINEARIZATION
TECHNIQUES . . . . . . . . . . . . . . . . . . . 109
APPENDIX B SPEED ANALYSIS OF BWCDAC AND FGDAC . . . . . . . . . 112
B.1 Using one-stage amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . 112
B.2 Using two-stage amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . 115
APPENDIX C NOISE ANALYSIS OF BWCDAC AND FGDAC . . . . . . . . . 117
C.1 Using one-stage amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . 117
C.2 Using two-stage amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . 120
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kevinwjs

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piao

为啥看不见附件呢？
谢谢

kevinwjs

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fanjx

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fanjx

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liuzhieetop

:victory: :victory:

dvyjnes

谢谢您的分享

iseesky

good, thanks!