I got a lot of warnings when I run "report_constraints"although they are just warning, should I ignore any of those:
Warning: No controlling value could be found for the clock gating cell 'I_ORCA_TOP/I_RISC_CORE/C12' for the clock pin 'DATA1_0'. (TIM-128)
Warning: Gated clock latch is not created for cell 'I_CLOCK_GEN/C44'on pin 'DATA1_0' in design 'ORCA'. (TIM-141)