ESD Transient Detection Circuit in a 65nm CMOS

semico_ljj · 发表于 2014-7-22 21:40:28

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ESD-Transient Detection Circuit with Equivalent
Capacitance-Coupling Detection Mechanism and High
Efficiency of Layout Area in a 65nm CMOS Technology

Abstract - A new power-rail ESD clamp circuit designed with equivalent capacitance-coupling detection
mechanism and high efficiency of layout area has been proposed and verified in a 65nm 1.2V CMOS process.
The proposed design has better immunity against mis-trigger or transient-induced latch-on event. The layout
area and the standby leakage current of the proposed design are much superior to that of traditional RC-based
power-rail ESD clamp circuit by both reducing ~46%.