在线咨询
eetop公众号 创芯大讲堂 创芯人才网
切换到宽版

EETOP 创芯网论坛 (原名:电子顶级开发网)

手机号码,快捷登录

手机号码,快捷登录

找回密码

  登录   注册  

快捷导航
搜帖子
查看: 2269|回复: 0

[招聘] 【社招】LSI中国2012年7月20职位更新

[复制链接]
发表于 2012-7-20 10:55:45 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

x

有意者,请将简历发至:
Tracey.zheng@lsi.com

如有任何疑问,请发送邮件至Tracey.zheng@lsi.com或拨打电话021-24191709.

也可加我msn: zql975504@hotmail.com

或者微博啊:
http://www.weibo.com/u/1752448637

1.
SerDes Field Coreware Engineer  -Shanghai1个)

Job Description

The Field Coreware Engineer is a challenging and cutting-edge position with responsibilities to work closely with LSI internal IP development, foundation IP, methodology, and design center engineering/development teams to support complex ASIC designs. This position will support LSI/3rd Party IP for customer ASIC and internal ASSP designs providing “Best in Class” support

Strong communications skills are important for this position. This is a position for developing and honing verbal and written communication skills, and for interfacing to many different people and engineering organizations within and external to LSI. Position requires regular interface with LSI customers. A successful candidate will have a strong design background, debug skills, good scripting skills, and hands on experience with IP integration. This position will require travel and onsite support at times at the customer site.

Requirements/Qualifications (Education)

- 5-10+ years experience as an application, design or development engineer

- Experience developing IP or integrating/implementing IP in an SOC (System on Chip)

- Prior experience with RTL coding and verification a plus

- Knowledge in one or more of the following IP:

o SerDes

o Memory IF: DDR, etc,

o Protocol IP : PCIe, Ethernet (example: 10G-KR4), etc…

o Processors/Subsystems

o SOC interconnect: AMBA, etc.

- Must have the ability to understand Specifications

- Experience with EDA tools such as Simulators (Synopsys VCS, Cadence NC-Verilog, Mentor ModelSim), Synopsys IC Compiler, Synopsys PrimeTime SI

- Understanding of the ASIC Design Flow

o Design Closure STA (Static Timing Analysis) Constraints

o Simulation/Debug

o Basic understanding of DFT (Design for Test)

o Basic Understand Power Estimation & Optimization

- Experience Debugging Simulations

- Basic Understanding of System Architecture/Applications

- Prototyping/Emulator knowledge a plus

- Soft/People Skills:

o Customer support skills (Communication, Positioning etc.)

o Issue Solving

o Conflict Management

- Willing to learn, expand horizons

- Positive attitude and ownership taking a must

2.

ASIC Customer Design Engineer-Shanghai(若干)


Job Description

- LSI Corporation offers an excellent opportunity to contribute to a team environment and to grow personal career path. You will be working with internal and external customers to develop state of the art IC solutions utilizing LSI's leading edge CMOS cell-based ASIC technologies. You will have responsibility for ASIC designs through all of the key development and implementation phases including RTL analysis, synthesis, design optimization, timing verification, simulation, test insertion, physical design, vector generation, and post-prototype test support. Candidates will have opportunity to work on the latest 40nm/28nm designs.

Detail design tasks include

- Presales support (die size support, memory generation, addressing customer questions and concerns.)

- RTL analysis & synthesis

- Top level and block level physical design Implementation (bonding, floor planning, power structure insertion, place and route, timing closure)

- Test structure insertion/silicon testing debug

- Formal verification

- Static timing analysis

- Cross talk analysis

- Power verification

- Physical verification

- Overtime, candidates are expected to develop the most of above skills. Candidates who have the desire to seek the in-depth and broad technical challenge should apply.

Requirements/Qualifications (Education)

Education: BS/MS Electrical, Computer Engineering or Equivalent

- 2+ years experience in ASIC design and implementation. Familiar with all aspects of ASIC design implementation flow and specializing in physical design or DFT implementation. The ideal candidate should have successfully completed at least one mid-size ASIC or ASSP tapeout.

- Experience with Synopsys Astro or ICC is a plus. Other physical design tool experience will also be considered. Scripting skill is a strong plus.

- Experience in debugging prototypes considered a strong plus. Knowledge and hands on use of test insertion / vector generation / verification a plus. Some experience with Signal integrity a bonus.

- Experience in working with customers is desired. Must possess excellent communication skills and strong self-motivation. Be able to effectively communicate with other members of the design team, supporting organizations, and management. This position requires frequent interface with LSI customers

- Candidates have ONE OR MORE good skill sets of the following areas are highly encouraged to apply:

- RTL Analysis/Synthesis/STA: The ideal candidate should have strong skills for the front-end of design

- implementation which includes RTL Analysis, Synthesis Strategies, and STA setup for complex ASIC

- environments. This would include strategies for power management.

OR

Physical Design Implementation: The ideal candidate should be strong in the Physical Design (at least at block level) which includes floor planning, design closure, & STA. Having strong DRC & LVS skills are a plus. Strong

- Synopsys Astro/ICC experience a plus. Having Mentor Calibre skills a plus.

- OR

- Physical Verification: The ideal candidate should have in-depth understanding of transistor level IC fabrication process, familiar with major foundries(TSMC or SMIC) runsets and verification flow, custom layout experience is a plus, successfully done LVS/DRC/ERC/Antenna check for multiple tapeouts is a strong plus. Understanding of DFM is a plus. Calibre experience is a plus.

- OR

- DFT: The ideal candidate should be strong in all DFT (Design for Test) for all aspects. This would include

- scan/TDF, TestKompress, MEMBIST/BISR, JTAG and etc. Having STA skills is a plus for all aspects of test. Responsible for support / debug of customer designs after delivery of prototypes

3.
Digital Design Engineer-Shanghai (若干)

Job Description

- Candidates for this position should have experience in the design and design management of large, high-speed, mixed signal SoCs. The designs must have contained a variety of both hard and soft-macro IP blocks. The candidate should be an expert in all parts of the SoC flow from IP deliverable hand-offs (in RTL or gate), to synthesis, DFT and test insertion, floorplanning, P&R, timing closure, signal integrity, power analysis and verification. After at least 5 years of design experience the candidate should have 3 years of design management experience. MS or higher degree in EE is required.

Requirements/Qualifications (Education)

- MSEE or higher degree in EE required.

4.
Junior SQA engineer-Shanghai(若干)

As a Junior Software Quality Assurance (SQA) Engineer (软件测试工程师/嵌入式软件测试工程师), you will work with an exceptionally talented and dynamic development team based in Shanghai, to test and validate cutting-edge firmware for our enormously successful second generation of mass storage controller in the consumer and enterprise segments. Participate in all aspects of design and product development through introduction and release. Duties include setting up interoperability lab, participating and refining methodology in interoperability testing. You will have the opportunity to create cutting edge products that transforms data storage.

Education and Experience Requirements

BS in Electrical Engineering, Computer Science, or Computer Engineering is required with 2+ years of software/hardware validation.

Knowledge, Skills, and Abilities
- Quick learner with high level of self-motivation and dedication, with ability to deliver high quality products on time
- Meticulous, methodical, uncompromising, and creative in testing
- Experience in software debugging, problem creation and trapping
- Communicate effectively in a team, able to multitask effectively in fast-paced environment.

- C / C++ Programming experience is optional but preferred

- Prior experience with PC / Notebook / HDD / SSD testing is optional but preferred

5.
Firmware Engineer-Shanghai(若干)

Education and Experience Requirements

BS in Electrical Engineering, Computer Science, or Computer Engineering is required with 6+ years of firmware development.

M.S. preferred with 4+ years in firmware development.

Knowledge, Skills, and Abilities

-
Must demonstrate expertise in design and implementation of event-driven, real time firmware solutions using C/C++ programming

-
Must be able to work with ASIC and software engineers in a collaborative environment

-
Quick learner with high level of self-motivation and dedication, with ability to deliver high quality products on time

-
Must have an excellent computer science background and demonstrated strength in designing efficient embedded firmware for storage or networking products

-
Firmware/System debug skills utilizing debugger, protocol analyzer is required

-
Good understanding of RTOS concepts including task switching, deadlocks, and resource management issues is required

-
High level of skill in problem recreation, trapping and resolution, possess good written and verbal communication skills.

-
Communicate effectively in a team, able to multitask effectively in fast-paced environment.

-
Understanding of NAND Flash concepts, knowledge of Flash management techniques, including wear leveling, garbage collection (optional but strong plus).

-
Knowledge and hands-on experience with storage protocols is preferred (SAS / SATA)

6.
Read Channel Emulation Engineer-Shanghai(若干)


Job Description

- The successful candidate will be responsible for verification and the associated design works(synthesis and Place&Route) on the FPGA and Palladium platform.

- Some design for peripheral logic but mainly verifying the blocks within a System on a Chip design. This will include the documentation of test plans and procedures.

- The candidate must be familiar with FPGA design flow.

- Candidate should be proficient in verilog design language and ASIC & FPGA CAD tools.

- Teamwork and good communication skills are critical

- Perl, Matlab, and C language and systems engineering skills is a plus

Requirements/Qualifications (Education)

- Education: BSEE or MSEE with 5+ years experience.

7.
Read Channel Verification Engineer-Shanghai(若干)

JOB DESCRIPTION:

As a member of the Read Channel team, candidate must be willing to work as an extended

member of the design team. Duties will include functional verification of Storage read

channel mixed-signal IP. Candidate will be expected to contribute to design and development

of System Verilog based verification environment and will be responsible for verification

closure of block/chip/system level functions for mixed signal based IP. Experience with

System Verilog and functional coverage methodologies are required. Must be willing to

follow a disciplined verification methodology and to work closely with a multi-location,

international design team. Excellent teamwork and communication skills are required.

PREFERRED EXPERIENCE:

BSEE with 3-5+ years of design and/or verification experience required, MSEE preferred.

Required knowledge and skills:

- Expertise in System Verilog required

- Good understanding of Digital Signal Processing

- Good understanding of Analog and Digital Circuits

- Very good analytical/debugging skill

- Good verbal and written communication skills

Desirable skills:

- Knowledge of Verilog-AMS, Perl

- Knowledge of verification methodologies including functional coverage and constrained

random testing

- Knowledge of VLSI design flows & DFT

- Familiarity of high level programming language

- Experience working with globally distributed team

8.

HDD Read Channel Architect -Shanghai
1个)

Job Description

- We are looking for an engineer with a track record of excellent performance to join our read channel architecture team. In this role you would be part of a dedicated team developing LSI's leading hard disk drive ASIC technology.

- This job spans the invention process from the conception of a new idea, through reduction to practice in software, close collaboration with design teams and verification of the design through to validation of performance through bench testing. In your role you will with work closely with Design and Verification teams in Shanghai and with the RC Architecture team in the United States.

- Our core requirements are a deep knowledge of digital communications technology; familiarity with detection and coding for magnetic recording; some experience implementing signal processing and detection algorithms in software and good programming skills in C/C++ and scripting languages. Experience with design verification and bench testing would both be very desirable.

Requirements/Qualifications (Education)

- PhD in Electrical Engineering or equivalent. Deep knowledge of the principles of digital communications. Familiarity with signal processing and programming

9.
Physical Design Engineer-Shanghai1个)

Job Description

Strong individual contributor needed to support product line growth. The candidate will work on leading edge storage solutions in ASIC, full custom and SoC environment. The ideal candidate will have demonstrated experience/exposure to digital physical design techniques including ASIC through full custom high-speed digital designs from synthesis through manufacture. Excellent communication skills are needed, as existing teams span multiple locations.

Requirements/Qualifications (Education)

High level of physical design experience required. Expertise with netlist driven routers, signal integrity, power analysis, cts design, design rule and connectivity verification is required. Familiarity with analog physical design, basic circuit designs, manufacturing and IC packaging desirable. Must be technically adept, a strong team player, ability to manage multiple priorities and have excellent interpersonal and communication skills, CET-6 preferred.
Degree Preferred:
BSEE +5 years experience

10.

Mixed-Signal read-channel/SoC Silicon Validation Engineer -Shanghai
1个)

Job Description

We are looking for engineers who have experience working in a lab characterizing high-speed mixed signal (analog and digital) read channel/SoC. The candidate must know how to use advanced waveform generators, oscilloscopes, network analyzers and logic analyzers. The engineer must also be expert in data analysis techniques and in various scripting languages (Perl, TCL, Python). Experience in lab automation (such as through GPIB scripting) is also desirable.

Requirements/Qualifications (Education)

- A moderate level (2-4 yrs) understanding of complex analog and digital circuits is required. It is not required, however preferred if candidates have knowledge on and/or experience in read channel/SoC.

- Excellent written and good English communication skills are required.

- Candidates should hold BSEE plus 2-4 yrs experience or MSEE (preferred) 1-2 yrs experience; and are expected to be highly motivated and resourceful in troubleshooting and problem solving. Global Team player needed. Must successfully interact with remote manager.



11.

Test Operations Engineer -Shanghai
(若干)

Job Description

- To support new product introduction into subcontractors and facilitate high volume ramp

- Manage execution deliverables covering test programs and all the essential test hardware and co-work with supply chain management to meet/exceed on time deployment at subcontractors

- Drive KPIs at subcontractors to meet/exceed LSI performance metrics expectations

- Drive cost reduction and margin improvement initiatives to achieve the manufacturing cost objectives

- Support new technology/best practices evaluation/assessment, early adoption and introduction into subcontractors

- Ensure test process compliance to prevent manufacturing execursions

- Ensure compliance of quality requirements at subcontractors

Requirements/Qualifications (Education)

- University graduate (EE degree) with 5 years or more in product, test, and high volume manufacturing operations experiences in the semiconductor area

- Solid background in high speed digital and mixed-signal testing is essential

- Working experiences with ATE andancillary test equipments. Teradyne Catalyst/UltraFlex, Advantest T2000, Delta/Seiko Epson handlers and TEL/Accretech/Opus probers will be of advantage

- C++ and/or Perl programming skills


12.

Test Engineer -Shanghai
1个)

Job Description

- To support prototype and production releases of new products. Manage debug of test program, design and debug of test hardware, and meet product release schedule.

- Support test program development for implementing changes in new test methodologies for test coverage improvement.

- Pursue Design for Test initiatives to optimize testability and achieve test cost reduction via test time reduction and multiple site test solutions for production release

- Support test chip test development and characterization of new IP used in LSI products.

Requirements/Qualifications (Education)

- University graduate students with top scores in GPA

- Prior working experiences in the semiconductor industry field, specially in either IDM, Fabless, or Foundry environment

- ATE programming skills would be essential ,

- C++ and/or Perl programming skills

-T2000 platform using experience is must

13.

Unix & Linux System Administrator
1个)

Job Description

- Install/Maintain/Support Unix based servers and workstations,

Provide deep level 2/3 expertise in problem resolution

- Participate in global teams, developing and implementing technical standards and

providing follow-the-sun support

- Work with group architecture teams to establish and fulfil necessary enhancements in

developing a reliable high performance UNIX platforms

- Build a working relationship with engineering staff and use your skills to propel their

productivity and help our Shanghai operation to grow and prosper

- Ensure highest levels of ownership, accountability and service are maintained within the

Team

Requirements/Qualifications (Education)

- 3 years of Linux systems administration experience, including OS installation, configuration, software management, troubleshooting OS related issues and asset management.

- Familiar with hardware from various vendors such as Dell, IBM, HP and etc

- Ability to quickly understand technical issues, investigate and troubleshoot problems in detail to find and correct the root cause.

- Experience of managing NIS/LDAP/DNS/NFS service in enterprise environment

- Knowledge of Kickstart and thin client solution

scripting/programming and debugging skills in perl and Unix shells.

- A good understanding of TCP/IP network concept

- Experience of Apache/NAS/SAN/LSF is a plus.

- Effective communication skills to support local internal customers and to form effective working relationships within a global IT organization.

- Must have a customer service oriented approach to their work.

- Either a degree in a computing or IT-related subject, or some evidence of putting learning to the test, for example RHCE or Solaris administrator qualifications.

14.

Systems Application Engineer(RSD) –Shenzhen/Shanghai
(若干)

Job Description

Provide product support for customers that use LSI’s I/O standard products. Product support involves helping the customer with the initial integration of the I/O standard product and debug of any software or hardware issues that arise. Work with the technical publications group on data manuals, systems engineering notes, and other documentation support. Provide training for customers and the Field Application Engineering organization. Work with the development engineering departments, hardware and software in debugging and supporting new products. Also involves working with silicon and software in a system environment

Requirements/Qualifications (Education)

- Considering candidates with BSEE/BSCE. 5+ years of experience required.

- The ideal candidate will have a technical understanding of SAS, SCSI and PCI Express. Candidate will have embedded firmware debug experience and posses systems level knowledge. Good communication/interpersonal skills and the ability to listen and incorporate feedback is essential. The ability to handle multiple tasks at the same time is also required.

- C coding experience or equivalent coursework required.

- Logic analyzer, oscilloscope and protocol analyzer experience a plus.

15.
Program Managers-Shenzhen1个)


Scope of programs:

- International Programs with contributors from several organizations and/or Business Units
- Programs with high business impact, above $20Mio total over product lifetime
- Programs with high development cost and effort, above 5 man years
- Programs with concurrent engineering of customer product and IP customization

Responsibilities:

- Project Definition:
Ensure that Goals, Objectives & Scope for the Program is defined, understood and agreed to
Work with engineering and management to form the project team.


Develop a Project Plan with clear ownership and deliverables milestones together with LSI and Customer teams
Work with engineering to calculate and forecast the effort and investment for successful project execution
Drive concurrent Risk Management as integral part of the project planning and execution

- Project Execution:

Call regular project review meetings, internal and with the customer

Coordinate and align the customer execution with internal LSI organizations and deliverables.

Ensure effective communication between all parties involved
Provide regular project reports (to the customer and internal)
Continuously track/maintain and measure project schedule progress against plan
Perform continuous Risk Management and elevate critical issues and risks.
Manage the Change Management Process (with the customer and internal to LSI)
Manage the Action Management Process
Facilitate Project Lessons Learned (internal and with the customer)

- Requirements:

Minimum 5 years experience in the fields of management, sales/marketing and engineering

Good understanding of the ASIC design process & methodology
Detailed knowledge of project management methodology, processes and tools
PMI certification is a plus
Expert knowledge in Microsoft Project, Excel, and Outlook
Basic knowledge in Microsoft Word and PowerPoint
Engineering degree or equivalent
Ability to adopt and execute a structured working methodology


Fluent verbal and writing language skills in native language and English

Strong communication skills
Excellent interpersonal and leadership skills
Self motivated and self driving

16.
Product Marketing Manager –Beijing/Shanghai/Shenzhen1个)

Job Description

The Product Marketing Manager will define and execute winning strategies for PCIe SSD storage products in the Asia Pacific marketplace. The PMM will drive customer design wins at targeted end customers, OEMs and SI/VAR Channel. This person is responsible for Proof of Concept (POC) and pre-sales activities, forecasting revenue, and speaking at marketing events. The PMM will support sales by developing marketing tools, creating pricing strategies and proposals, and facilitating product demonstration and evaluation. This person will operate cross-functionally with multiple LSI organizations including Product Management (internal), Corporate Marketing, Channel Marketing and Sales

Requirements/Qualifications (Education)

- Over 10 years experience with 5+ years technology product marketing experience. Enterprise storage solution sales/marketing role in the last 3 years is a plus

- MBA desired

- Willingness to travel over 30% of the time

- Experience in enterprise storage solution technologies: Oracle/SAP database, virtualization, caching software, SAN and NAS. Knowledge of solid state storage a plus

- Demonstrated ability to establish strong end user customer and partner relationships, data center customer engagement experience highly desired

- Strong leadership skills. Drive to succeed, achievement orientation, self-motivation.

- Systems thinking, with the ability to identify and unravel issues before they hit the schedule.

- A positive, energetic, can-do attitude. Not requiring a lot of hand-holding.

您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /1 下一条

小黑屋| 手机版| 关于我们| 联系我们| 在线咨询| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2024-11-18 11:33 , Processed in 0.015331 second(s), 7 queries , Gzip On, Redis On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表