|
马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。
您需要 登录 才可以下载或查看,没有账号?注册
x
Introduction to Low Power.......................................................................................6
Low Power Today................................................................................................6
Power Management ............................................................................................9
Complete Low-Power RTL-to-GDSII Flow Using CPF ......................................23
A Holistic Approach to Low-Power Intent ..........................................................31
Verification of Low-Power Intent with CPF............................................................32
Power Intent Validation .....................................................................................32
Low-Power Verification......................................................................................34
CPF Verification Summary ................................................................................50
Front-End Design with CPF ..................................................................................52
Architectural Exploration....................................................................................52
Synthesis Low-Power Optimization ...................................................................54
Automated Power Reduction in Synthesis.........................................................56
CPF-Powered Reduction in Synthesis ..............................................................62
Simulation for Power Estimation........................................................................72
CFP Synthesis Summary ..................................................................................75
Low-Power Implementation with CPF ...................................................................76
Introduction to Low-Power Implementation .......................................................76
Gate-Level Optimization in Power-Aware Physical Synthesis ...........................80
Clock Gating in Power-Aware Physical Synthesis.............................................80
Multi-Vth Optimization in Power-Aware Physical Synthesis ...............................81
Multiple Supply Voltage (MSV) in Power-Aware Physical Synthesis.................82
Power Shutoff (PSO) in Power-Aware Physical Synthesis ................................85
Dynamic Voltage/Frequency Scaling (DVFS) Implementation ..........................93
Substrate Biasing Implementation.....................................................................94
CPF Implementation Summary .........................................................................98
CPF User Experience ...........................................................................................99
ARC Energy PRO: Technology for Active Power Management ........................99
NEC Electronics: Integrating Power Awareness in SoC Design with CPF ......107
FUJITSU: CPF in the Low-Power Design Reference Flow..............................126
NXP User Experience: Complex SoC Implementation with CPF.....................143
References and Bibliography ..............................................................................162
Low-Power Links.................................................................................................164
Power Forward Initiative ..................................................................................164
Cadence Low-Power Links..............................................................................164
CPF Terminology Glossary.................................................................................165
Design Objects ................................................................................................165
CPF Objects ....................................................................................................165
Special Library Cells for Power Management..................................................166 |
|