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在二十年的时间里，NVIDIA 一直在视觉计算方面 (计算机图形的艺术与科学) 勇当先锋。 凭借我们发明的 GPU ——现代视觉计算的引擎，这一领域现已扩张到涵盖了视频游戏、电影制作、产品设计、医学诊断以及科学研究等等。 现在，视觉计算正变得越来越重要，它影响着人们与科技之间的互动方式。 NVIDIA坚信我们的领先地位是来自於优秀员工的贡献，毋庸置疑，我们将以最佳方式发掘杰出的人才。NVIDIA人力资源团队矢志为NVIDIA员工提供持续的训练和成长。在热衷学习的环境中，我们的终极目标是创造员工和公司的双赢。如果您笃信并服膺於创新丶智识的诚信丶直接和坦率丶团队合作以及工作高标准，请加入我们，您正是我们正在寻找的人才。
请将个人简历或者联系方式寄至elainew@nvidia.com信箱，我们将由专人与您联系。
ASIC Physical Design Team 的主要工作内容分为两大部分，芯片物理整合和时序分析及其修正。
这个工作有两个突出的特点
1.接触面广。
有机会接触了解到从前端设计到后端流片的各个环节。
2.有专长的知识，物理整合和时序分析需要对综合，网表质量检查，形式验证，芯片整体的物理需求有深入的了解。同时对静态时序分析，时钟结构的调整和优化，功耗的优化有深入的了解。
NVIDIA的芯片规模大，工艺先进。这给我们的工作带来了极大的挑战。对个人来说也有机会学习到最领先的芯片设计知识和方法。
同于其他的海外团队，Shanghai ASIC-PD 团队是全球团队中的核心成员。已经独立完成了多块芯片的物理整合和时序分析。技术水平在全球团队中处于领先地位。
上海：
JobDescription Position Title: LogicDesign Methodology Engineer (Shanghai) Brief overview:
Advance andsupport the Design Implementation methodology for all of NVIDIA's semiconductorproducts. - Serve as liaison to communicate and coordinate methodology projects between sites.
- Develop RTL analysis, logic and physical synthesis, and low-power methodologies.
- Evaluate state-of-the-art design and analysis EDA tools.
- Serve as in-house expert for Design Implementation flows and EDA tools. Act as liaison between designers and EDA vendors. Analyze issues, create solutions or workarounds, and provide testcases.
- Develop new design implementation flows.
What you'll bedoing:
- Keep abreast of methodology initiatives across sites. Help coordinate efforts through good communication and prioritization. Help prevent duplicate work.
- Evaluate new EDA tools and features.
- Provide support for EDA tools and flows.
- Develop and evaluate new design implementation flows
- Analyze data from real designs in production flows to identify significant efficiency and QoR improvement opportunities.
What we need tosee:
Education:
- BS in Electrical or Computer Engineering, MS preferred
Experience:
- 3 years minimum experience with Verilog and digital IC development environment, tools, script writing
- Design Experience with logic synthesis and formal equivalence checking.
- Physical Design knowledge or experience is very helpful.
- Design Experience with Static Timing Analysis is a plus.
- Prefer experience with hands-on implementation of advanced-process high-speed chips.
Technical skills& abilities:
- Digital IC design (RTL, gates)
- Proficiency in Perl, Tcl, and Verilog
- Software engineering: software design and algorithms
- Very good communication skills (in particular, above average English skills)
Location &travel required:
- Shanghai office.
- Approximately annual travel to US.
PhysicalRequirements, if applicable (lifting, standing, etc):
- Normal office/computer environment.
请将个人简历或者联系方式寄至elainew@nvidia.com信箱，我们将由专人与您联系。
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发表于 2016-7-19 17:42:59
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