求引用

zhukh

急需提高引用率，求有在学术界发paper的兄弟，做一下方向之一的，帮忙引用一下我的paper光纤通信transceiver的，silicon photonics, CML, TIA, Verilog-A建模的，高速Link,等等
1. Design Considerations for Traveling-Wave Modulator Based CMOS Photonic Transmitters, TCAS2,2015
2. Compact Verilog-A modeling of silicon traveling-wave modulator for hybrid CMOS photonic circuit design
Circuits and Systems (MWSCAS), 2014

3. Design of a 10-Gb/s integrated limiting receiver for silicon photonics interconnects, MWSCA2013

ADC，PLL也有两篇水文

4.
Systematic Design of 10-bit 50MS/s Pipelined ADC. WMED 2013
5.  Design Analysis of a 12.5 GHz PLL in 130 nm SiGe BiCMOS Process
IEEE Microelectronics and Electron Devices (WMED), 2015


多谢！

z1314007

挺谦虚啊，经历很励志，赶紧回来当海归吧

zhukh

挺谦虚啊，经历很励志，赶紧回来当海归吧
z1314007 发表于 2015-6-16 16:28

                               
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熟人？

lixiaojun707

试试、试试

zhukh

several more :
1.        Kehan Zhu, Vishal Saxena, “From Design to Test: A High-Speed PRBS”, IEEE Trans. VLSI Systems, May 2018.
2.        Kehan Zhu, Vishal Saxena, “Case Study of a Hybrid Optoelectronic Limiting Receiver”, IEEE Trans. Circuits Syst. I, May 2017.

7.        Xinyu Wu, Vishal Saxena, Kehan Zhu, Sakkarapani Balagopal, “A CMOS spiking neuron for brain-inspired neural networks with resistive synapses and in situ learning”, IEEE Trans. Circuits Syst. II, vol. 62, No. 11, 2015.
8.        Xinyu Wu, Vishal Saxena, Kehan Zhu, “Homogeneous spiking neuromorphic system for real-world pattern recognition”, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2015.

9.        Sakkarapani Balagopal, Kehan Zhu, Xinyu Wu, Vishal Saxena, "Design-to-testing: a low-power, 1.25 GHz, single-bit single-loop continuous-time Delta Sigma modulator with 15 MHz bandwidth and 60 dB dynamic range", Analog Integrated Circuits and Signal Processing, 2016.
10.        Sakkarapani Balagopal, Kehan Zhu, Vishal Saxena, “A 1 GS/s, 31 MHz BW, 76.3 dB dynamic range, 34 mW CT-Delta Sigma ADC with 1.5 cycle quantizer delay and improved STF”, Analog Integrated Circuits and Signal Processing, 1-12, 2013.

2.        Vishal Saxena, Xinyu Wu, Kehan Zhu, “Energy-Efficient CMOS Memristive Synapses for Mixed-Signal Neuromorphic System-on-a-Chip”, IEEE ISCAS, 2018.
3.        Kehan Zhu, Rui Wang, Xinyu Wu, Vishal Saxena, “Behavioral Modeling and Characterization of Silicon Photonic Mach-Zehnder Modulator”, IEEE MWSCAS, 2017.
4.        Kehan Zhu, Sakkarapani Balagopal, Xinyu Wu, Vishal Saxena, “Realization of a 10 GHz PLL in IBM 130 nm SiGe BiCMOS Process for Optical Transmitter”, IEEE ISCAS, 2017.
5.        Kehan Zhu, Vishal Saxena, Xinyu Wu, “Modeling and Optimization of the Bondwire Interface in a Hybrid CMOS Photonic Traveling-wave MZM Transmitter”, System-on-Chip Conference, 2016.