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Abstract—A fast-settling adaptive calibration technique is presented that makes phase noise cancelling fractional- PLLs practical for the low reference frequencies commonly used in wireless communication systems. The technique is demonstrated as an enabling component of a 2.4 GHz ISM band CMOS PLL IC with a 730 kHz bandwidth, a 12MHz reference, and an on-chip loop filter. In addition to the adaptive calibration technique, the IC incorporates
a dynamic charge pump biasing technique to reduce power dissipation. The worst-case phase noise of the IC is 101 dBc/Hz and 124 dBc/Hz at 100 kHz and 3 MHz offsets, respectively, and the adaptive phase noise cancellation technique has a worst-case settling time of 35 s. The IC is implemented in 0.18 m CMOS technology. It measures 2.2 2.2 mm2, and its core circuitry consumes 20.9 mA from a 1.8 V supply
DECEMBER 2007 newly published |
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eetop公众号
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发表于 2007-12-31 12:06:04
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