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共有9篇论文
1，A modeling platform for efficient characterization of phase-locked loop -spl Delta-spl Sigma- frequency synthesizers.pdf
2，A VCO with high supply noise rejection and its application to PLL frequency synthesizer.pdf
3，Behavioral modeling and simulation of jitter and phase noise in fractional-N PLL frequency synthesizer.pdf
4，Behavioural Modelling and Simulation of Dual Cascaded PLL Based Frequency Synthesizer.pdf
5，Design and modelling of a low phase noise pll frequency synthesizer.pdf
6，Modeling and simulation of ΣΔ frequency synthesizers.pdf
7，Modeling of fractional-N division frequency synthesizers with SIMULINK and MATLAB.pdf
8，Time behavioral model for phase-domain ADPLL based frequency synthesizer.pdf
9，锁相环的VHDL_AMS建模与仿真分析.pdf（中文）
[ 本帖最后由 podao 于 2009-5-29 09:32 编辑 ] |
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eetop公众号
创芯大讲堂
创芯人才网
发表于 2009-5-27 22:35:28
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