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楼主: littleannie

关于PLL相位噪声的仿真

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发表于 2009-2-24 16:06:33 | 显示全部楼层
thx a lot!
发表于 2009-3-5 17:29:11 | 显示全部楼层
萬分感謝
发表于 2009-3-6 06:27:55 | 显示全部楼层
PLL Phase Simulation actually is not that much difficult as you think. Using Matlab or Cadence both can do.  Basically  check noise from individual block first, then build PLL noise model(Matlab or Cadence) to check the whole loop simulation. The critical thing is you have to identify where is noise dorminant from and how to adjust the loop parameter to get the optimal results.

Hopefully it helps to you.
发表于 2009-3-6 10:23:21 | 显示全部楼层
有没有关于建模的论文呢
发表于 2009-3-6 14:09:52 | 显示全部楼层

zhichi

ddddddddddddddddddddddddddddddddd
发表于 2009-3-6 14:19:28 | 显示全部楼层
I have ever built the circuit level model and matlab model as well.  For circuit level, it is more convenient to use. let me try to pack it and upload later if many ppl interested. Otherwise, don't waste my time.
发表于 2009-3-7 14:27:08 | 显示全部楼层
进来学习一下。。。。
发表于 2009-3-9 00:42:53 | 显示全部楼层

看下哈

先好好看下哈!
发表于 2009-3-22 09:39:17 | 显示全部楼层
好东西,人人顶!谢谢楼主。
发表于 2009-3-23 02:23:33 | 显示全部楼层


原帖由 prof3 于 2009-3-6 14:19 发表
I have ever built the circuit level model and matlab model as well.  For circuit level, it is more convenient to use. let me try to pack it and upload later if many ppl interested. Otherwise, don't wa ...




I do think so. But the problem is even I get the phase noise for each module like PFD, CHP, VCO, how can I add it into the loop, you know, the phase noise is a function of frequncy.Could you show us how to do it?Thanks.
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