经典論文

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经典論文,
1.STUDIES ON PERFORMANCE LIMITATIONS IN CMOS DACS
本书的部分前言
The digital-to-analog converter (DAC) is a bottle neck in broadband communication
systems. High update rates are required in combination with high accuracy.
In this work, we study factors that limit the performance of current-steering
DACs, focusing on the linearity properties of DACs for telecommunication applications
like digital subscriber lines (DSL).
There are many different sources of nonlinear behavior in current-steering DACs.
Static errors dominate the low-frequency behavior, whereas the high-frequency
behavior is dominated by dynamic errors. The static errors are mainly caused by
mismatch between components and Þnite output resistance in the current sources.
The dynamic nonlinearity caused by parasitic capacitance in transistors and wires
is of special interest in this work. Two closely related types of models of this
dynamic nonlinearity were developed.
The linearity requirements on the converters for high-speed telecommunication
applications can be hard to meet using a straightforward approach. Various methods
for improving the linearity of DACs are studied in this work. Some of the
methods, like dynamic element matching (DEM) and a novel differential DAC
architecture, rely on redundant coding to improve the linearity. Two methods utilizing
models of the dynamic nonlinearity caused by the parasitic capacitance in
the current sources were also developed. One of the methods utilizes a feedback
similar to delta-sigma modulation to spectrally shape the distortion. The other
method is a type of predistortion where the input is modiÞed in order to yield an
improved output that is closer to the desired output, compared with using the
original input.
CMOS technology is popular for implementation of integrated circuits. Two
main advantages of CMOS, compared with, e.g., bipolar technology, is low cost
and the possibility of designing circuits with relatively low power consumption.
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CMOS is also the preferred technology for implementing large systems on a single
chip with both analog and digital blocks. Three different current-steering
CMOS DACs were developed in this work, and are presented in the thesis.Measurement results show close resemblance with the simulation resultsobtained
from the developed models.

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