The truth behind gimmick of domestic SiC MOSFET "lowest Rdson"

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Analysis of the truth and potential hazards behind the publicity gimmick of "lowest on-resistance and lowest specific on-resistance" of domestic silicon carbide MOSFET:

In order to seek short-term interests to gain financing or investment, the interests of end customers and the reputation of the industry will be damaged in the medium and long term, which will ultimately cause investors to lose all their money.

1. The technical truth behind the domestic silicon carbide MOSFET parameter competition

Gate oxide thinning and reliability sacrifice
Some domestic SiC MOSFET manufacturers reduce the on-resistance RDS ( on ) and specific on-resistance Rds(on)SP by excessively thinning the gate oxide layer thickness (such as from 50nm to below 30nm) , but this significantly weakens the gate oxide reliability. Some domestic SiC MOSFETs can only withstand +19V voltage in HTGB test (high-quality domestic SiC MOSFETs can withstand +22V/3000H), and the TDDB life is only 10³ hours (high-quality domestic SiC MOSFETs are 10⁵ hours). Gate oxide thinning causes the electric field strength to exceed the critical value (>4MV/cm), accelerates defect accumulation, and causes threshold voltage drift or even breakdown.

Experimental verification is reduced.
Some domestic SiC MOSFET manufacturers skip long-term reliability tests (such as HTGB, TDDB) and mass produce after only a small number of experiments (Page 9). High-quality domestic SiC MOSFETs have passed 3000+ sets of DOE structure optimization. However, some domestic SiC MOSFET manufacturers have only completed 100 sets of experiments, and the process stability is insufficient, resulting in a surge in the risk of device failure under high temperature and high electric field.

Misleading parameter calibration:
Some domestic SiC MOSFET manufacturers claim the "lowest specific on-resistance", which is actually the laboratory limit value and does not take into account the actual working conditions (such as junction temperature fluctuations and switching stress). Some domestic SiC MOSFETs may only be effective at room temperature (25°C), and their high-temperature performance will be greatly degraded.

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2. The harm of short-term profit drive

System failure risk

Batch failure : Devices with thinned gate oxide are prone to threshold voltage drift due to long-term high-temperature operation in automotive-grade applications, leading to failure of the motor controller. A typical case is the recall of a certain car company in 2024 due to batch failure of silicon carbide modules.

Safety hazard : Failure of components in the power storage converter (PCS) may cause a DC bus short circuit, resulting in a fire risk.

Life cycle costs soar

Maintenance cost : The life of low-reliability domestic silicon carbide MOSFET devices is only 1-2 years (the life of competing TDDB is 10³ hours ≈ 41 days of continuous operation), while the life of high-reliability products exceeds 10 years. Frequent replacement leads to a 3-5 times increase in operation and maintenance costs.

Hidden losses : The loss of a single shutdown of an industrial or commercial energy storage system due to a fault can reach hundreds of thousands of yuan, far exceeding the cost of purchasing components.

Industry ecological damage

Bad money drives out good money : Low-priced and low-quality domestic silicon carbide MOSFET products squeeze the living space of high-reliability manufacturers. High-quality silicon carbide MOSFET companies are forced to turn to the low-end market, inhibiting technological innovation.

Standards lag : The industry lacks mandatory reliability tests (such as HTGB+22V/3000H), and companies define loose conditions on their own, resulting in the chaos of "false compliance".

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3. Breakthrough Path: From “Parameter Competition” to “Quality Competition”

Technical aspects

Reliability-first design : Use scientific models (such as E model, 1/E model) to optimize gate oxide thickness and balance RDS ( on ) and lifespan, such as controlling the gate oxide thickness at 50nm and ensuring the electric field strength is <4MV/cm.

Full-process verification : domestic SiC MOSFET manufacturers are required to undergo HTGB+TDDB combination testing, publish DOE reports and failure analysis data, and accept third-party testing.

Market Level

Customer education : Promote the shift from "price orientation" to "full life cycle cost" assessment.

Standard setting : Establish mandatory certification for automotive level (AQG324) and grid level, and require disclosure of acceleration factors and life prediction models.

Policy level

Capacity guidance : limit the expansion of low-end capacity and provide targeted subsidies for high-reliability technologies.

Punishment mechanism : Companies that falsify parameters or conceal invalid data will be included in the list of dishonest persons, promoting a reshuffle of the industry.

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in conclusion

Behind the propaganda of the "lowest (specific) on-resistance" of domestic silicon carbide MOSFETs, the essence is a short-sighted technical behavior that sacrifices reliability in exchange for short-term parameter advantages . Its harm is not limited to product failure, but will also distort the market mechanism and hinder industrial upgrading. Only through deep cultivation of technology, improvement of standards, and ecological reconstruction can the industry be pushed from "false prosperity" to "high-quality development" and truly support the rise of strategic industries such as new energy and electric vehicles.