有跑HAPS protocompiler的吗？一跑就出错

bravexplorer

一跑Labs就出错：

uc.log 出错信息如下：


Error: Message for 'CMD-005' has occurred (ERR-3)

Error-[ZEBUUC-TCL-EVAL] TCL evaluation error.
  Tcl evaluation error while evaluating :
  /haha/HAPS_80_Jump_Start_Session/HAPS_80/Labs/Partition_Lab_HAPS80/ucdb/vcs_config_file.tcl.
  Please make sure this file contains valid TCL code.


Error-[ZEBUUC-TCL-ERRTR] TCL error trace.
  Tcl evaluation error trace for file
  /haha/HAPS_80_Jump_Start_Session/HAPS_80/Labs/Partition_Lab_HAPS80/ucdb/vcs_config_file.tcl.Please
  have a look at the following trace:
      while executing
  "UCVcsVerdiFlowNoFSDB -true"
      (file
  "/haha/HAPS_80_Jump_Start_Session/HAPS_80/Labs/Partition_Lab_HAPS80/ucdb/vcs_config_file.tcl"
  line 11).

vcs_config_file.tcl里面的内容如下，这个文件是自动生成的。UCVcsVerdiFlowNoFSDB -true这句有啥问题？实在看不出来。
UCSetUTFFile /haha/HAPS_80_Jump_Start_Session/HAPS_80/Labs/Partition_Lab_HAPS80/./scripts/run.utf
UCSetProtoDumpDir /haha/HAPS_80_Jump_Start_Session/HAPS_80/Labs/Partition_Lab_HAPS80/ucdb
UCProtoFlow flow20
UCVLibFile /haha/eda/T-2022.12-SP1/lib/xilinx/unisim_retarget.v -attr xilinx_cell
UCVLibFile /haha/eda/T-2022.12-SP1/lib/xilinx/unisim_vivado.v -attr xilinx_cell
UCVLibFile /haha/eda/T-2022.12-SP1/lib/synip/hcei/zceistubs.v
UCVLibDir /opt/eda/vivado_2020.2/Vivado/data/verilog/src/unimacro
UCVLibFile /haha/eda/T-2022.12-SP1/lib/vlog/hypermods.v
UCVLibFile /haha/eda/T-2022.12-SP1/lib/vlog/umr_capim.v
UCSetVcsVerdiFlow -true
UCVcsVerdiFlowNoFSDB -true

A1985

不存在的tcl命令。。。肯能