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IEEE Journals of Solid-State Circuits 2008, Volume 43 Issue 2(Feb)
Front cover
IEEE Journal of Solid-State Circuits publication information
Table of contents
New Associate Editor
A Clock-Less 10-bit Pipeline-Like A/D Converter for Self-Triggered Sensors
A 1.8-V 22-mW 10-bit 30-MS/s Pipelined CMOS ADC for Low-Power Subsampling Applications
A 2.7-mW 2-MHz Continuous-Time $Sigma Delta$ Modulator With a Hybrid Active–Passive Loop Filter
A 15-bit Linear 20-MS/s Pipelined ADC Digitally Calibrated With Signal-Dependent Dithering
A Power Optimized Continuous-Time $Delta Sigma $ ADC for Audio Applications
A 0.9-V 60-$mu{hbox {W}}$ 1-Bit Fourth-Order Delta-Sigma Modulator With 83-dB Dynamic Range
A 10-Bit LCD Column Driver With Piecewise Linear Digital-to-Analog Converters
Fast-Lock Hybrid PLL Combining Fractional- $N$ and Integer-$N$ Modes of Differing Bandwidths
A Digital Calibration Technique for Charge Pumps in Phase-Locked Systems
A High Linearity, Fast-Locking Pulsewidth Control Loop With Digitally Programmable Duty Cycle Correction for Wide Range Operation
A Sub-Picosecond Resolution 0.5–1.5 GHz Digital-to-Phase Converter
A Wide-Tracking Range Clock and Data Recovery Circuit
A 0.18-$mu{hbox {m}}$ CMOS Balanced Amplifier for 24-GHz Applications
A Low-Power SRAM Using Bit-Line Charge-Recycling
A Polar Modulator Using Self-Oscillating Amplifiers and an Injection-Locked Upconversion Mixer
A Programmable Impedance Matching Circuit for Voiceband Modems
A Millimeter-Wave CMOS Heterodyne Receiver With On-Chip LO and Divider
Sensitivity Degradation in a Tri-Band GSM BiCMOS Direct-Conversion Receiver Caused by Transient Substrate Heating
$Delta Sigma $ PLL Transmitter With a Loop-Bandwidth Calibration System
High-Voltage Analog System for a Mobile NAND Flash
A 0.2 V, 480 kb Subthreshold SRAM With 1 k Cells Per Bitline for Ultra-Low-Voltage Computing
High-Speed and Low-Power Design Techniques for TCAM Macros
A 20 Gb/s 1:4 DEMUX Without Inductors and Low-Power Divide-by-2 Circuit in 0.13 $mu{hbox {m}}$ CMOS Technology
On-Chip Measurement of Deep Metastability in Synchronizers
A Precision Low-TC Wide-Range CMOS Current Reference
A 128$times$ 128 120 dB 15 $mu$s Latency Asynchronous Temporal Contrast Vision Sensor
IEEE Journal of Solid-State Circuits information for authors
[ 本帖最后由 eBookMania 于 2008-2-19 23:27 编辑 ] |
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