门控时钟时序约束的疑问

lzhj21

在阅读《Static Timing Analysis for Nanometer Designs》这本书的10.5节的Clock Gating with a Multiplexer时有一个地方没有想明白
这里说关注MCLK的检查，MCLK接到了I0上也就是相当于门控信号为0时打开时钟，我的理解是这就相当于低电平有效的门控时钟，但是后续给出的约束是

我不理解的是为什么set_clock_gating_check的类型是-high而不是-low，是我理解有误吗？

hxy2018

这里clock gating check的目的是不期望clock上出现glitch或被clipped. 这里是要关注MCLK, 那就是要保证MCLK为高电平时不能被切，那就是-high.
-high
Specifies that the check is performed on the high level of the clock. By default, PrimeTime determines whether to use the high or
low level of the clock using information from the cell's logic. That is, for AND and NAND gates PrimeTime performs the check on
the high level; for OR and NOR gates, on the low level. For some complex cells (for example, MUX and OR-AND) PrimeTime
cannot determine which to use, and does not perform checks unless you specify either the -high or -low options.

hxy2018

这里的clock gating check是不期望clock上出现glitch或被clipped. 关注的是MCLK, 要确保MCLK高电平时S不能变，不然切换的话会被切，所以是-high。

-high
Specifies that the check is performed on the high level of the clock. By default, PrimeTime determines whether to use the high or
low level of the clock using information from the cell's logic. That is, for AND and NAND gates PrimeTime performs the check on
the high level; for OR and NOR gates, on the low level. For some complex cells (for example, MUX and OR-AND) PrimeTime
cannot determine which to use, and does not perform checks unless you specify either the -high or -low options.

hxy2018

这里clock gating check的不期望clock出现glitch或被clipped. 关注的是MCLK，那就是确保MCLK在高电平时不能被切，不然就会出现glitch或clipped. 所以用-high.  在PT的cmd ref里也有一些描述。 -high Specifies that the check is performed on the high level of the clock. By default, PrimeTime determines whether to use the high or low level of the clock using information from the cell's logic. That is, for AND and NAND gates PrimeTime performs the check on the high level; for OR and NOR gates, on the low level. For some complex cells (for example, MUX and OR-AND) PrimeTime cannot determine which to use, and does not perform checks unless you specify either the -high or -low options.

lzhj21

hxy2018 发表于 2024-6-21 11:59
这里clock gating check的不期望clock出现glitch或被clipped. 关注的是MCLK，那就是确保MCLK在高电平时不能 ...

感谢解答，明白了