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This article presents a switched-capacitor feedforward technique to enable passive summation in discrete-time (DT) delta-sigma ADCs with only one feedforward capacitor. The proposed technique leads to higher power efficiency and reduced design effort because the amplifier does not carry the input signal thus has a lower output swing, and the power-hungry active adder is avoided. It applies to all kinds of quantizers such as the noise-shaping (NS) SAR, enabling the use of higher order passive NS quantizers for low power applications. Published in: 2023 IEEE International Symposium on Circuits and Systems (ISCAS) Date of Conference: 21-25 May 2023 Date Added to IEEE Xplore: 21 July 2023 ISBN Information: