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[求助] 电源板块进行layout XL的时候报了奇怪的错,该怎么调?

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发表于 2024-3-27 18:45:20 | 显示全部楼层 |阅读模式

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   如题,这边对cadence中的电源模块进行layout XL的时候报了几个warning,这个东西不管的话好像LVS会报错,请问一下,这个该怎么解决?是有关什么的问题?电阻、电容还是MOS管啊?



*WARNING* (BND-2005): Layout instances and terminals do not match the source.
Use 'XL Status' in the Navigator or run 'Connectivity - Check - Against Source' for more details.
If the bindings are correct, run the 'Update from Source' commands,
otherwise run 'Connectivity - Update - Binding'.
INFO (LX-1063): Building the layout generation form...
INFO (LCE-1007): The cell verifier found
INFO (LCE-1008):    161 open(s)
*Warning* Reduced number of segments from 2 to 1 to
        avoid maximum length violation!
*Warning* Unable to meet maximum length requirements by adjusting number of segments or segment width.
        Reverting cntRows to its previous value!
*Warning* The square number is strongly suggested to be larger than 10.0 for resistor, user may sacrifice simulation accuracy if insist to use this size of resistor!

*Warning* Reduced number of segments from 2 to 1 to
        avoid maximum length violation!
*Warning* Unable to meet maximum length requirements by adjusting number of segments or segment width.
        Reverting segW to its previous value!
*Warning* The square number is strongly suggested to be larger than 10.0 for resistor, user may sacrifice simulation accuracy if insist to use this size of resistor!

*Warning* Reduced number of segments from 2 to 1 to
        avoid maximum length violation!
*Warning* Unable to meet maximum length requirements by adjusting number of segments or segment width.
        Reverting cntRows to its previous value!
*Warning* The square number is strongly suggested to be larger than 10.0 for resistor, user may sacrifice simulation accuracy if insist to use this size of resistor!




发表于 2024-3-28 10:02:02 | 显示全部楼层
绝大部分warning都不会影响lvs结果,建议确定一下接线是否正确
 楼主| 发表于 2024-3-28 18:19:28 | 显示全部楼层
即使这个waring是标红的也不影响吗?那它对整体的电路会导致失调或者误差过大吗?
发表于 2024-3-29 09:20:56 | 显示全部楼层
Use 'XL Status' in the Navigator or run 'Connectivity - Check - Against Source' for more details.
If the bindings are correct, run the 'Update from Source' commands,
otherwise run 'Connectivity - Update - Binding'.
 楼主| 发表于 2024-3-29 16:44:02 | 显示全部楼层
好的,我试试这个
发表于 2024-4-2 22:48:11 | 显示全部楼层


龙斗士 发表于 2024-3-29 16:44
好的,我试试这个


请问楼主解决了吗?我最近也遇到同样的问题了,卡了好久
发表于 2024-4-3 15:38:42 | 显示全部楼层
有详细解释了,麻烦踢我一下,我也碰到过类似的报错,不过是出现在我拿公共库的A版图过验证的时候,结果中有错误点,我通过结果定位错误在版图哪个位置时,工具自动把我本地库之前copy的A版图弹出来并在它上面展示错误点,主视窗就报这个错,我按上面的指导操作了一通也没用,最后把本地库里面的版图删掉才算不出现这样的情况,不太理解哪出问题了
 楼主| 发表于 2024-4-3 15:42:19 | 显示全部楼层
目前大致可以确定是电阻的问题,需要调整一下。但是调到什么程度我也不清楚,只能慢慢试了
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