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发表于 2024-2-2 21:12:10
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本帖最后由 haier822 于 2024-2-2 21:16 编辑
Hi Jack, 感谢您提出的意见指定static_netlist为def, set_power_analysis_mode -method static -static_netlist def， 学习了
然后重新跑static method的分析，最后static power结果就和dynamic method中报出的static power(internal power, switching power, leakage power)是完全一样的了。我的理解，基于DEF 分析的结果要比基于verilog netlist的应该更为精确, 因为DEF中包含详细的版图物理信息。
附带help中的对-static_netlist的释义：
set_power_analysis_mode
//-----------------------------
-static_netlist {verilog | def}
Specifies to perform static power analysis using a Verilog or DEF only neltist.
By default, the static power analysis is performed using the Verilog netlist as the primary netlist. Using this parameter, you can specify DEF when a DEF netlist with logical connectivity is available, and use it as primary and not consider the Verilog netlist.
This parameter is also enabled when set_rail_analysis_mode -report_power_in_parallel is true for static power computation.
Default : verilog
//-------------------------------
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发表于 2024-2-2 01:53:16
