在套了seal ring之后有了CHIPB层,再检查DRC就报了个这样的错:Vy_R_13
(Vy OR RVy) interact Vy_Empty_100 is not allowed for chip level check.
Vy_Empty_100: (CHIPB NOT (Vy OR RVy OR DUM_Vy))sd/su 50
DRC doesn't flag when the Vy or Rvy is Multi_Vy_Connection and in the Small Iso_Array.
(1)Multi_Vy_Connection: at least 2ea RVy with spaces <=0.5um (check RVy su 0.25um region). or 4ea square Vy with space <= 0.5um (check square Vy su 0.25um region) at the intersection of Mxy/1.25xMy and Mxy-1/1.25xMy-1.
Mxy/1.25xMy is the metal layer directly above (Vy or RVy)
2) Small_Iso_Array: at least >=2ea RVy +4ea (Vy OR DUM Vy).or≥3ea RVy + 2ea (Vy OR DUM_Vy). or>= 4ea RVy;or >=8ea (Vy OR RVy OR DUM_Vy) in the (Vy/RVy) su 3um region