『三味书屋』发书过年，猪年要走了。。。

benemale

一楼留着更新用。。。^ ^
这堆书放在电脑里好久了，花了好长时间才整理完。
最近论坛比较慢，这么多书估计要发到过年了，大家喜欢哪本就跟贴吼一声，我优先上传吧~~~

[ 本帖最后由 benemale 于 2008-1-26 21:48 编辑 ]

benemale

	A Roadmap for Formal Property Verification Dasgupta, Pallab 2006, XIII, 251 p., Hardcover ISBN: 978-1-4020-4757-2 This item usually ships in 2-3 business days
	$99.00

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About this book
Integrating formal property verification (FPV) into an existing design process raises several interesting questions. Have I written enough properties? Have I written a consistent set of properties? What should I do when the FPV tool runs into capacity issues? This book develops the answers to these questions and fits them into a roadmap for formal property verification – a roadmap that shows how to glue FPV technology into the traditional validation flow. A Roadmap for Formal Property Verification explores the key issues in this powerful technology through simple examples – you do not need any background on formal methods to read most parts of this book.


Written for:
Design verification engineers responsible for complex chip and system designs: CPRs, DSPs, network processors, graphic processors and the SoCs that use them and Electronic Design Automation (EDA) companies developing the next generation of CAD tools for formal design verification

Keywords:

• FPV methods
• VLSI Design Verification
• design intent coverage
• formal verification
• system verilog assertions

[ 本帖最后由 benemale 于 2008-1-26 22:45 编辑 ]

benemale

	Constraint-Based Verification Yuan, Jun, Pixley, Carl, Aziz, Adnan 2006, XII, 253 p., Hardcover ISBN: 978-0-387-25947-5 This item usually ships in 2-3 business days
	$109.00

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About this book
Constraint-Based Verification covers an emerging field in functional verification of electronic designs, referred to as the "constraint-based verification."  The topics are developed in the context of a wide range of dynamic and static verification approaches including simulation, emulation, and formal methods.  The goal is to show how constraints, or assertions, can be used towards automating the generation of testbenches, resulting in a seamless verification flow.  Topics such as verification coverage, and connection with assertion based verification, are also covered.
The book targets verification engineers as well as researchers. It covers both methodological and technical issues.  Particular stress is given to the latest advances in functional verification.
The research community has witnessed recent growth of interests in constraint-based functional verification.  Various techniques have been developed.  They are relatively new, but have reached a level of maturity so that they are appearing in commercial tools such as Vera and System Verilog.


Written for:
Engineers and verification practioners, researchers

[ 本帖最后由 benemale 于 2008-1-26 22:53 编辑 ]

benemale

	Effective Functional Verification Principles and Processes Vasudevan, Srivatsa 2006, XXIV, 256 p., Hardcover ISBN: 978-0-387-28601-3 This item usually ships in 2-3 business days
	$119.00

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About this book
Effective Functional Verification is organized into 4 parts. The first part contains 3 chapters designed appeal to newcomers and experienced people to the field. There is a survey of various verification methodologies and a discussion of them.
The second part with 3 chapters is targeted towards people in management and higher up on the experience ladders. New verification engineers reading these chapters learn what is expected and how things work in verification. Some case studies are also presented with analysis of proposed improvements.
The last two parts are the result of experience of several years. It goes into how to optimize a verification plan and an environment and how to get results effectively. Various subjects are discussed here to get the most out of a verification environment. Lastely, the appendix discusses some tool specifics to help remove repetitive work and also some tool specific guidelines.
While reading Effective Functional Verification, one will be able to get a jump start on planning and executing a verification plan using the concepts presented.

Written for:
Senior verification engineers, students, professionals

Keywords:

• Case studies
• Plans
• Principles
• Verification processes

[ 本帖最后由 benemale 于 2008-1-26 23:07 编辑 ]

benemale

	Scalable Hardware Verification with Symbolic Simulation Bertacco, Valeria 2006, XX, 179 p., Hardcover ISBN: 978-0-387-24411-2 This item usually ships in 2-3 business days
	$119.00

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About this book
Scalable Hardware Verification with Symbolic Simulation presents recent advancements in symbolic simulation-based solutions which radically improve scalability. It overviews current verification techniques, both based on logic simulation and formal verification methods, and unveils the inner workings of symbolic simulation. The core of this book focuses on new techniques that narrow the performance gap between the complexity of digital systems and the limited ability to verify them. In particular, it covers a range of solutions that exploit approximation and parametrization methods, including quasi-symbolic simulation, cycle-based symbolic simulation, and parameterizations based on disjoint-support decompositions.

In structuring this book, the author’s hope was to provide interesting reading for a broad range of design automation readers. The first two chapters provide an overview of digital systems design and, in particular, verification. Chapter 3 reviews mainstream symbolic techniques in formal verification, dedicating most of its focus to symbolic simulation. The fourth chapter covers the necessary principles of parametric forms and disjoint-support decompositions. Chapters 5 and 6 focus on recent symbolic simulation techniques, and the final chapter addresses key topics needing further research.

Scalable Hardware Verification with Symbolic Simulation is for verification engineers and researchers in the design automation field.

Highlights:

● A discussion of the leading hardware verification techniques, including simulation and formal verification solutions
● Important concepts related to the underlying models and algorithms employed in the field
● The latest innovations in the area of symbolic simulation, exploiting techniques such as parametric forms and decomposition properties of Boolean functions
● Providing insights into possible new developments in the hardware verification

Written for:
Professional CAD verification engineers, researchers in formal verification and validation, advanced graduate students

[ 本帖最后由 benemale 于 2008-1-27 10:35 编辑 ]

benemale

	Next Generation Design and Verification Methodologies for Distributed Embedded Control Systems Proceedings of the GM R&D Workshop, Bangalore, India, January 2007 Ramesh, S.; Sampath, P. (Eds.) 2007, XXIII, 300 p., Hardcover ISBN: 978-1-4020-6253-7 Ships in 3 - 5 business days
	$169.00

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About this book
This volume is the proceedings of the workshop “Next Generation Design and Verification Methodologies for Distributed Embedded Control Systems” organised by General Motors R&D, India Science Lab. The workshop was held on January 5-6 2007 at the NIAS auditorium, IISc campus, Bangalore, India. This workshop is the first of its kind to be organised by an automotive major to bring together the leaders in the field of embedded systems development to present state-of-the-art work, and to discuss future strategies for addressing the increasing complexity of embedded control systems. The workshop consisted of invited talks given by leading experts and researchers from academic and industrial organizations. The workshop covered all areas of embedded systems development and in particular:

• Formal specification and verification of distributed, heterogeneous, embedded systems
• Formal semantics of modeling languages
• Model-based specification and testing
• Formal approach to component based development
• Software product line engineering
• Automatic code generation for distributed, embedded systems.

Written for:
Industry professionals, academic researchers and graduate students interested in the area of rigorous design and verification of distributed embedded systems

Keywords:

• Distributed Systems
• Embedded Systems
• Formal Methods
• Model-based Development
• Software Verification

[ 本帖最后由 benemale 于 2008-1-26 23:26 编辑 ]

benemale

	Physical Design Essentials An ASIC Design Implementation Perspective Golshan, Khosrow 2007, XIX, 211 p., Hardcover ISBN: 978-0-387-36642-5 Ships in 3 - 5 business days
	$129.00

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About this book
Physical Design Essentials explains the basic steps required in the physical design of Application Specific Integrated Circuits (ASICs). The subject matter presentation follows the industry-common ASIC physical design flow.

Topics covered include:

• Basic standard cell design, transistor-sizing, and layout styles
• Linear, non-linear, and polynomial characterization
• Physical design constraints and floor planning styles
• Algorithms used for placement
• Clock tree synthesis
• Algorithms used for global and detailed routing
• Parasitic extraction
• Functional timing and physical methods of verification
• Testing Techniques

Physical Design Essentials is written for professional design engineers who need to be conversant with all aspects of ASIC design implementation: device processes, library development, place-and-route algorithms, verification, and testing.

Written for:
ASIC and physical designers, design and business manager involved with ASIC design, semiconductor foundry professionals such a process engineers, students studying EE and CS in the field of VLSI Architecture and Design Automation, training of newly hired physical design engineers

[ 本帖最后由 benemale 于 2008-1-26 23:50 编辑 ]

benemale

	Embedded System Design Marwedel, P. 2006, XVII, 241 p., Softcover ISBN: 978-0-387-29237-3 This item usually ships in 2-3 business days
	$49.95

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About this book
Embedded systems can be defined as information processing systems embedded into enclosing products such as cars, telecommunication or fabrication equipment. Such systems come with a large number of common characteristics, including real-time constraints, and dependability as well as efficiency requirements. Following the success of information technology (IT) for office and workflow applications, embedded systems are considered to be the most important application area of IT during the coming years. This importance of embedded systems is so far not well reflected in many of the current curricula.
Embedded System Design is intended as an aid for changing this situation. It provides the material for a first course on embedded systems, but can also be used by PhD students and professors. A key goal of this book is to provide an overview of embedded system design and to relate the most important topics in embedded system design to each other. It should help to motivate students as well as professors to put more emphasis on education in embedded systems. In order to facilitate teaching from this book, slides, exercises and other related material can be downloaded via the author's web page.
Written for:
PhD students, professors

[ 本帖最后由 benemale 于 2008-1-26 23:13 编辑 ]

benemale

Embedded System Design: Topics, Techniques and Trends IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30 - June 1, 2007, Irvine (CA), USA Series: IFIP International Federation for Information Processing , Vol. 231 Rettberg, A.; Zanella, M.; Domer, R.; Gerstlauer, A.; Rammig, F. (Eds.) 2007, XVI, 444 p., Hardcover ISBN: 978-0-387-72257-3 This item usually ships in 2-3 business days

$185.00

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About this book
Over recent years, embedded systems have gained an enormous amount of processing power and functionality. Many of the formerly external components can now be integrated into a single System-on-Chip. This tendency has resulted in a dramatic reduction in the size and cost of embedded systems. As a unique technology, the design of embedded systems is an essential element of many innovations.
Embedded System Design: Topics, Techniques and Trends presents the technical program of the International Embedded Systems Symposium (IESS) 2007 held in Irvine, California. IESS is a unique forum to present novel ideas, exchange timely research results, and discuss the state of the art and future trends in the field of embedded systems. Contributors and participants from both industry and academia take active part in this symposium. The IESS conference is organized by the Computer Systems Technology committee (TC10) of the International Federation for Information Processing (IFIP).
Timley topics, techniques and trends in embedded system design are covered by the chapters in this book, including design methodology, specification and modeling, embedded software and hardware synthesis, networks-on-chip, distributed and networked systems, and system verification and validation. Particular emphaisis is paid to automotive and medical applications. A set of actual case studies and special aspects in embedded system design are included as well.

Written for:
Researchers and practitioners in embedded system design

[ 本帖最后由 benemale 于 2008-1-27 10:58 编辑 ]

benemale

	Fine- and Coarse-Grain Reconfigurable Computing Vassiliadis, Stamatis; Soudris, Dimitrios (Eds.) 2007, XVI, 384 p., Hardcover ISBN: 978-1-4020-6504-0 This item usually ships in 2-3 business days
	$119.00

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About this book
Fine- and Coarse-Grain Reconfigurable Computing gives the basic concepts and building blocks for the design of Fine- (or FPGA) and Coarse-Grain Reconfigurable Architectures. Recently-developed integrated architecture design and software-supported design flow of FPGA and coarse-grain reconfigurable architecture are also described. The book is accompanied by an interactive CD which includes case studies and lab projects for the design of FPGA and Coarse-grain architectures based on the European funded projects AMDREL and MOLEN, respectively.
Part I consists of two extensive surveys of FPGA and Coarse-Grain Reconfigurable Architectures:
The FPGA technology is defined, which includes architecture, logic block structure, interconnect, and configuration methods and existing fine-grain reconfigurable architectures emerged from both academia and industry. Additionally, the implementation techniques and CAD tools developed to facilitate the implementation of a system in reconfigurable hardware by the industry and academia are provided.
In addition the features, the advantages and limitations of the coarse-grain reconfigurable systems, the specific issues that should be addressed during the design phase, as well as representative existing coarse-grain reconfigurable systems are explained.
In Part II, case studies, innovative research results about reconfigurable architectures and design frameworks from three projects AMDREL, MOLEN and ADRES&DRESC, and, a new classification according to microcoded architectural criteria are described.
Fine- and Coarse-Grain Reconfigurable Computing is an essential reference for researchers and professionals and can be used as a textbook by undergraduate, graduate students and professors.
Foreword by Yale Patt, Jim Smith and Mateo Valero

Written for:
Undergraduate graduate students in electrical and/or computer engineering, physics (with electronics/VLSI design activities), graduate students: MSc programmes in electrical and computer eng., or digital/VLSI design, embedded systems design, PhD students in VLSI design, low power design, digital design, embedded hardware design, system-on-chip design, IP components design, logic design/synthesis, transistor-level design, processor design, high-speed arithmetic processors, and reconfigurable architectures, DSP VLSI aignal processing, and engineers/professionals from industry in FPGA design, reconfigurable architectures, VLSI design, low power VLSI design, digital design, System-on-chip design, ASIC design

Keywords:

• CAD Design Flow
• Coarse-Grain Architecture
• Computer Science
• FPGA
• Reconfigurable Architecture

[ 本帖最后由 benemale 于 2008-1-27 23:53 编辑 ]