Multi-voltage CMOS Circuit Design

jaseper

Multi-voltage CMOS Circuit Design

Volkan Kursun
University of Wisconsin-Madison, USA
Eby G. Friedman
University of Rochester, USA


The scaling of semiconductor process technologies has been continuing for more than four
decades. Advancements in process technologies are the fuel that has been moving the
semiconductor industry. In response to growing customer demand for applications that
require integrated circuits with enhanced performance and functionality at reduced cost, a
new process generation has been introduced by the semiconductor industry every two to
three years during the past forty years. The challenge for enhancing the performance and
functionality of integrated circuits has traditionally been managing the greater design and
manufacturing complexity and higher power consumption. As stressed throughout this book,
the generation, distribution, and dissipation of power are at the forefront of current problems
faced by integrated circuit designers.
In order to continue the historical trend of reducing the unit cost of a circuit while
simultaneously enhancing performance and functionality, radical changes are required in the
manner in which integrated circuits are designed. Higher speed at all costs is no longer an
option. Energy-efficient semiconductor devices, circuit techniques, and microarchitectures
are necessary to maintain the pace of expansion that the semiconductor industry has enjoyed
over the past forty years.
Several important opportunities that exist for low power and reliable integrated circuit
and system design are highlighted in this book. Design choices that can be made while
scaling the supply and threshold voltages, in order to lower power consumption and enhance
device reliability without degrading circuit speed, are described. Techniques for simultaneously
achieving energy efficiency and high speed are presented.
Systems with multiple power supplies can significantly reduce power consumption
without degrading speed by selectively lowering the supply voltage along non-critical
delay paths. High-frequency monolithic DC–DC conversion techniques applicable to
multiple supply voltage CMOS circuits are presented that provide additional voltage
levels with low energy and area overhead. Full integration of a high efficiency buck
converter on the same die as a dual supply voltage microprocessor is demonstrated to be
feasible. A low swing DC–DC conversion technique is presented that enhances the energy
efficiency of a monolithic DC–DC converter. Device reliability issues in monolithic
DC–DC converters operating at high input voltages are discussed. Advanced cascode
bridge circuits that guarantee the reliable operation of deep submicrometer MOSFETs
without exposure to high voltage stress while operating at high input and output voltages
are introduced.

An important technique for reducing the impact of supply voltage scaling on circuit
performance is scaling the threshold voltages. Exponentially increasing subthreshold
leakage currents and worsening short-channel effects at reduced threshold voltages are
discussed. Increasing performance degradation caused by die-to-die and within-die parameter
variations at reduced gate lengths and threshold voltages is described. Multiple
threshold voltage CMOS circuits offer decreased subthreshold leakage currents and
enhanced performance by selectively lowering the threshold voltages along speed–critical
paths. Dynamic threshold voltage scaling techniques reduce the deleterious effects of
standard static threshold voltage scaling. A variable threshold voltage CMOS circuit
technique for simultaneously enhancing the speed and power characteristics of dynamic
circuits is introduced. Both reverse and forward body bias techniques are applied to domino
logic circuits for enhanced robustness against on-chip noise. A circuit technique using sleep
switch dual threshold voltage domino logic that provides significant savings in subthreshold
leakage energy is described.
Due to lagging battery technologies, increasing cost of cooling, and decreasing yield
(caused by degradation in device, circuit, and system-level reliability), the authors of this
book strongly believe that the end of the road for traditional speed-centric CMOS design
techniques is quickly approaching. Low-power and reliability concerns will dominate at all
levels of the design hierarchy and mark the end of this speed-centric road that has been
traveled by the semiconductor industry for more than forty years. Meanwhile, market
demand for integrated circuits with ever higher performance offering a wider variety of
applications will continue to grow consistent with the evolution and increasing complexity
of human society. Low-power and reliable integrated circuit and system design will develop
into an increasingly exciting field full of opportunities. The concepts presented in this book
can be considered as a prelude to a larger discussion of the many possible opportunities for
moving the performance and functionality of nanometer semiconductor technologies to even
higher levels while staying within a manageable envelope of power consumption and
reliability.

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liuzhieetop

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alex_bai

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sawfish

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jaseper

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