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发表于 2008-4-21 10:02:31
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I provide the kay information for this paper!
I think the article is abigous and not valuable, much more knowledge is extracted from <art of analog layout>.
Transistor matching in analog CMOS applications.
Marcel J.M. Pelgrom, Hans P. Tuinhout and Maarten Vertregt
Philips Research Laboratories, Bldg. WAY5, Prof. Holstlaan 4, 5656AA Eindhoven, the Netherlands,
FAX +31-40-2744657, e-mail: pelgrom@natlab.research.philips.com
This paper gives an overview of MOSFET mis-
match e ects that form a performance/yield limita-
tion for many designs. After a general description
of (mis)matching, a comparison over past and future
process generations is presented. The application of
the matching model in CAD and analog circuit de-
sign is discussed. Mismatch e ects gain importance
as critical dimensions and CMOS power supply volt-
ages decrease. |
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