The_flipped voltage_follower

永远的牛虻

The_flipped_voltage_follower_a_useful_cell_for_low-voltage_low-power_circuit_design

永远的牛虻

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永远的牛虻

A Super Class-AB OTA with High Output
Current and no Open Loop Gain Degradation


Abstract— A scheme to achieve simultaneously extremely
high slew rate improvement and avoiding open loop gain
degradation in one stage super class-AB op-amps is introduced.
It overcomes the serious shortcoming of super class-AB OTAs
that show very high output current enhancement factors at the
expense of degrading the open loop gain. The proposed scheme
uses dynamically biased cascode transistors to avoid gain and
slew rate degradation. Experimental results of a fabricated super
class-AB OTA in 180 nm CMOS technology with open loop gain
of 67 dB, a factor two improvement in GBW and a current
enhancement factor of 270 verify the proposed scheme.

永远的牛虻

永远的牛虻 发表于 2023-5-17 10:21
a super class ab

   A High-Swing- High-Speed CMOS WTA Using Differential Flipped Voltage Followers



Abstract—A high-performance CMOS winner-take-all circuit
based on the differential flipped voltage follower is introduced.
Simulations demonstrate the potential of the circuit to operate at
very high speed, with high precision even for close input values
and with low supply voltages. Experimental verification of the
circuit is provided in a 0.5- m CMOS technology.
Index Terms—Analog CMOS integrated circuits,

永远的牛虻

A low-voltage low-power QFG-based Sigma-Delta modulator for electroencephalogram applications



Abstract— A Sigma-Delta (ΣΔ) modulator with 10 bits of
resolution and only 55 nW power consumption for
electroencephalogram (EEG) applications is presented. The
overall modulator operates from 1.2V using Quasi-Floating-
Gates (QFG) based circuits. The system has been implemented
in a standard 0.5-μm CMOS process. Post-layout simulations
have been performed showing 70 dB of SNR with an
oversampling ratio of 64.

永远的牛虻

A new scheme for DC offset compensation and its application to current mode and voltage mode D-A converters


Abstract—A new DC offset compensation technique for voltage
buffers is presented. It can used to improve the accuracy of data
converters. This technique also compensates the finite gain error
of the op-amp and it is fast compared to conventional
techniques. As an application of this technique, a 10-bit current
mode and a 10-bit voltage mode D/A converter are described.
Simulation results in 0.5μm CMOS technology are provided to
validate the design.

永远的牛虻

High slew rate two stage A-AB and AB-AB op-amps with phase lead compensation at output node and local common mode feedback



Abstract—Class A/AB and class AB/AB two stage op-amps with
very high and symmetrical slew rate are introduced. They use
output dominant pole with phase lead compensation. Resistive
local common mode feedback is used to achieve a class AB
output stage. One of the architectures uses also a class AB
pseudo-differential pair to achieve class AB operation in the
input stage. Experimental results verify slew rate enhancement
factors of 12 and 50 for the A/AB and AB/AB circuits
respectively. This is achieved with same bandwidth and noise and
very small additional quiescent power dissipation or hardware
complexity.

永远的牛虻

永远的牛虻 发表于 2023-5-17 15:46
High slew rate two stage A-AB and AB-AB op-amps with phase lead compensation at output node and loca ...

Super-Gain-Boosted Miller Op-Amp Based on Nested Regulated Cascode Techniques with FoMAOLDC - 24-614kV-V.MHz.pF--Watt



Abstract—A simple technique to greatly enhance the DC openloop
gain of a Miller op-amp is introduced here. It is based on the
utilization of nested regulated cascode amplifiers. It uses
conventional Miller compensation and does not increase the
supply voltage. The proposed scheme has a DC open-loop gain
Figure of Merit FoMAOLDC=24,614kV/V.pF.MHz/μWatt. It is
especially appropriate for utilization in modern deep submicrometer
CMOS technologies with low intrinsic gain.

永远的牛虻

永远的牛虻 发表于 2023-5-17 15:47
Super-Gain-Boosted Miller Op-Amp Based on Nested Regulated Cascode Techniques with FoMAOLDC - 24-6 ...

Single Transistor High-Impedance Tail Current Source With Extended Common-Mode Input Range and Reduced Supply Requirements



Abstract—A compact implementation of a single transistor tail
current source with very high output impedance ( 40 M
)
and low-voltage requirements is introduced. The tail transistor
can operate with less than a drain-source saturation voltage and
allows implementation of low-voltage differential pairs with wide
common-mode input range and very high common-mode rejection
ratio. Simulation and experimental results are shown that validate
the proposed circuit.

斩海之歌

这个电路 硕士期间没少研究 用于做buffer