primetime报No constrained paths怎么解决

仙电彭于晏

初学pt，想通过primetime 跑出电路中某些路径的spice网表文件，然后再拿到spice去做老化仿真。是sdc文件写的约束不对吗，还是哪有问题了，小白求助pt跑的tcl脚本如下：

set search_path "/home/crazy/Desktop/example/lab"
set link_path "* NangateOpenCellLibrary_slow.db"
set target_library { NangateOpenCellLibrary_slow.db}
set link_library {* NangateOpenCellLibrary_slow.db}
set design s27

read_verilog /home/crazy/Desktop/example/lab/report/decode_netlist.v
link_design $design
current_design $design
read_sdc decode.sdc
report_timing
write_spice_deck -output fresh_path.spi -sub_circuit_file NangateOpenCellLibrary.spi  -logic_one_voltage 1.8 [get_timing_paths -from [get_port G0] -to [get_port G17]]
sdc文件如下：
  6 set sdc_version 2.0
  7  
  8 set_units -time ns -resistance MOhm -capacitance fF -voltage V -current mA
  9 set_max_delay 1.5 -from [get_port G0] -to [get_port G17]]
10 set_min_delay 0.5 -from [get_port G0] -to [get_port G17]]                  
跑完报错：

pt_shell> source run.tcl
Loading db file '/home/crazy/Desktop/example/lab/NangateOpenCellLibrary_slow.db'
Loading verilog file '/home/crazy/Desktop/example/lab/report/decode_netlist.v'
Information: tri converted to a wire with no special attributes
        at line 12 in /home/crazy/Desktop/example/lab/report/decode_netlist.v (SVR-21)
Information: tri converted to a wire with no special attributes
        at line 13 in /home/crazy/Desktop/example/lab/report/decode_netlist.v (SVR-21)
Information: tri converted to a wire with no special attributes
        at line 14 in /home/crazy/Desktop/example/lab/report/decode_netlist.v (SVR-21)
Information: tri converted to a wire with no special attributes
        at line 15 in /home/crazy/Desktop/example/lab/report/decode_netlist.v (SVR-21)
Information: tri converted to a wire with no special attributes
        at line 16 in /home/crazy/Desktop/example/lab/report/decode_netlist.v (SVR-21)
Information: tri converted to a wire with no special attributes
        at line 17 in /home/crazy/Desktop/example/lab/report/decode_netlist.v (SVR-21)
Information: tri converted to a wire with no special attributes
        at line 18 in /home/crazy/Desktop/example/lab/report/decode_netlist.v (SVR-21)
Linking design s27...
Warning: Unable to resolve reference to 'dff' in 's27'. (LNK-005)
Information: Creating black box for DFF_0/dff... (LNK-043)
Information: Creating black box for DFF_1/dff... (LNK-043)
Information: Creating black box for DFF_2/dff... (LNK-043)
Information: 130 (97.01%) library cells are unused in library NangateOpenCellLibrary..... (LNK-045)
Information: total 130 library cells are unused (LNK-046)
Design 's27' was successfully linked.
Information: There are 22 leaf cells, ports, hiers and 21 nets in the design (LNK-047)

Reading SDC version 2.0...
Warning: Nothing implicitly matched '_sel15]' (SEL-003)
Error: Nothing matched for to_list (SEL-005)
Warning: Nothing implicitly matched '_sel17]' (SEL-003)
Error: Nothing matched for to_list (SEL-005)
****************************************
Report : timing
        -path_type full
        -delay_type max
        -max_paths 1
        -sort_by slack
Design : s27
Version: M-2016.12-SP1
Date   : Sun Nov  6 01:26:52 2022
****************************************

No constrained paths.

Information: Checked out license 'PrimeTime-SI' (PT-019)
Error: Nothing matched for collection (SEL-005)
No timing path or timing arc found for the object_list
Information: Defining new variable 'design'. (CMD-041)

king-wa

你有的path没有setup，所以会报这个。

lzqxiang

试一下： set timing_report_unconstrained_paths true(man一下，以防错字)

仙电彭于晏

lzqxiang 发表于 2022-11-7 10:06
试一下： set timing_report_unconstrained_paths true(man一下，以防错字)

这个我之前试过，确实是不报No constrained paths了

仙电彭于晏

king-wa 发表于 2022-11-7 09:57
你有的path没有setup，所以会报这个。

感谢回复，我查了下资料，发现没有对进行端口约束，设置约束完之后就没有报No constrained paths了。

菜鸟一号

仙电彭于晏 发表于 2022-11-7 12:06
感谢回复，我查了下资料，发现没有对进行端口约束，设置约束完之后就没有报No constrained paths了。
...

主要是没有create clock吧

仙电彭于晏

菜鸟一号 发表于 2022-11-7 13:52
主要是没有create clock吧

应该是的

兔子IC

菜鸟一号 发表于 2022-11-7 13:52
主要是没有create clock吧

你可以用check_timing这种命令来查一下，是不是约束全了，养成一个好习惯


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Dean_007

lz请问能分享一下lab文件吗？