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[招聘] 急招:DFT 上海

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发表于 2022-6-19 15:46:12 | 显示全部楼层 |阅读模式

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急招:DFT
base上海

GPU大企,空间广泛,薪资从优!
手机/微信同号:13918754010

 楼主| 发表于 2022-6-19 15:47:43 | 显示全部楼层
顶一下
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 楼主| 发表于 2022-6-22 20:05:03 | 显示全部楼层
Responsibilities:   The candidate is expected to be responsible for following tasks 1. Participate in SOC full chip DFT feature and architecture definition 2. Implement SOC DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic. 3. Generate DFT related timing constraints and work for timing closure 4. Develop and verify high coverage and cost-effective test patterns for the production test 5.Evaluate and establish the advanced DFT tools and flow  Qualifications:    1. 8+ years’ experience for Bachelor or 3+ years for Master in DFT design and verification, test pattern development 2. Good Knowledge of Scan/ATPG, MBIST and boundary scan and other DFT techniques 3. Good Knowledge of industry DFT tools like DFTMax, TetraMax ,TestKompress, FastScan, Tessent Mbist, SMS etc. 4. Good knowledge of digital SoC/ASIC design, including STA, verification and RTL coding 5. Proficient in hardware description languages such as Verilog, System Verilog and VHDL 6. Good Knowledge of script language, such as Tcl, Python, Perl 7. Good English communication skills 8. Strong commitment to schedule and work quality, good team player
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 楼主| 发表于 2022-6-22 20:08:56 | 显示全部楼层
Responsibilities:
The candidate is expected to be responsiblefor following tasks
1. Participate in SOC full chip DFT featureand architecture definition
2. Implement SOC DFT function includingSCAN, Boundary SCAN, MBIST, Analog Macro test logic.
3. Generate DFT related timing constraintsand work for timing closure
4. Develop and verify high coverage andcost-effective test patterns for the production test
5.Evaluate and establish the advanced DFTtools and flow
Qualifications:  
1. 8+ years’ experience for Bachelor or 3+ years for Master in DFTdesign and verification, test pattern development
2. Good Knowledge of Scan/ATPG, MBIST andboundary scan and other DFT techniques
3. Good Knowledge of industry DFT toolslike DFTMax, TetraMax ,TestKompress, FastScan, Tessent Mbist, SMS etc.
4. Good knowledge of digital SoC/ASICdesign, including STA, verification and RTL coding
5. Proficient in hardware descriptionlanguages such as Verilog, System Verilog and VHDL
6. Good Knowledge of script language, suchas Tcl, Python, Perl
7. Good English communication skills
8. Strong commitment to schedule and workquality, good team player

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 楼主| 发表于 2022-7-22 16:02:18 | 显示全部楼层
欢迎大家前来自荐或推荐。推荐过来的候选人,推荐过来的候选人,一经录用报到,会发万元以上的红包。辛苦多谢!
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