|
楼主 |
发表于 2008-1-2 21:43:05
|
显示全部楼层
原帖由 leonken156 于 2008-1-2 19:35 发表
多谢LZ。
请问有这本书吗
The Gm/Id design methodology for cmos analog low power integrated circuits
Author: Jespers, Paul G.A.
谢谢。
查了一下,好新的书,好象要今年3月份才发布,属于Analog Circuits and Signal Processing丛书系列的。。。
Table of contents
Chapter 1: Synthesis of the Intrinsic Gain Stage. Introduction. 1.1 The Intrinsic Gain Stage. 1.2 Synthesis of the Intrinsic Gain Stage (I.G.S.).
Chapter 2: The Charge Sheet Model revisited. 2.1 Why the Charge Sheet Model? 2.2 The Generic Drain Current equation. 2.3 The Charge Sheet Model drain current equation. 2.4 Drain current evaluation by means of the MATLAB toolbox. 2.5 Common source configuration. 2.6 The Charge Sheet Model under weak inversion conditions. 2.7 The gm / ID ratio. 2.8 The common gate configuration. 2.9 Conclusion.
Chapter 3: A graphical representation of the current in MOS transistors. 3.1 A graphical illustration of the Drain Current. 3.2 Some comments regarding the surface potential. 3.3 Strong inversion approximations. 3.4 A few circuit examples showing the potential of the graphical construction.
Chapter 4: The E.K.V. - A.C.M. model. – preliminary 4.1 The drain current equation. 4.2 Introduction of the drain and gate voltages 4.3 Examples 4.4 Parameter identification 4.5 Checking the EKV-ACM model against the Charge Sheet Model. 4.6 gm/ID 4.7 Synthesis of the Intrinsic Gain Stage.
Chapter 5: Small signal parameters.
Chapter 6: Real transistors. Output conductance. Short channel effects. Models or Tables? gm/ID synthesis using tables is feasible. Synthesis of the Intrinsic Gain Stage.
Chapter 7: Synthesis of Miller Op Amps.
(emphasis on low-voltage, low-power)
Chapter 8: Synthesis of cascode Op Amps.
(emphasis on low-voltage, low-power)
[ 本帖最后由 benemale 于 2008-1-2 21:46 编辑 ] |
|