『三味书屋』元旦送礼之二：Springer 2008新书s

benemale

	SOI Circuit Design Concepts Bernstein, Kerry, Rohrer, Norman J. 2007, XVIII, 222 p., Softcover ISBN: 978-0-387-74099-7 This item usually ships in 2-3 business days
	$79.95

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About this book
Market demand for microprocessor performance has motivated continued scaling of CMOS through a succession of lithography generations. Quantum mechanical limitations to continued scaling are becoming readily apparent. Partially Depleted Silicon-on-Insulator (PD-SOI) technology is emerging as a promising means of addressing these limitations. It also introduces additional design complexity which must be well understood.

SOI Circuit Design Concepts first introduces the student or practicing engineer to SOI device physics and its fundamental idiosyncrasies. It then walks the reader through realizations of these mechanisms which are observed in common high-speed microprocessor designs. Rules of thumb and comparisons to conventional bulk CMOS are offered to guide implementation. SOI's ultimate advantage, however, may lie in the unique circuit topologies it supports; a number of these novel new approaches are described as well.

SOI Circuit Design Concepts draws upon the latest industry literature as well as the firsthand experiences of its authors. It is an ideal introduction to the concepts of governing SOI use and provides a firm foundation for further study of this exciting new technology paradigm.

Written for:
Students, practicing engineers
Keywords:

• PD-SOI
• bernstein
• bernstien
• bulk CMOS
• circuit design
• high speed
• microprocessor
• partially depleted
• performance
• quantum mechanics
• soi

[ 本帖最后由 benemale 于 2008-1-7 23:49 编辑 ]

benemale

	Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogenous Platforms Ma, Z., Marchal, P., Scarpazza, D.P., Yang, P., Wong, C., Gómez, J.I., Himpe, S., Ykman-Couvreur, C., Catthoor, F. 2007, XII, 264 p., Hardcover ISBN: 978-1-4020-6328-2 Ships in 3 - 5 business days
	$119.00

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About this book
Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogeneous Platforms gives an overview of the state-of-the-art in system-level design trade-off explorations for concurrent tasks running on embedded heterogeneous multiple processors. The targeted application domain covers complex embedded real-time multi-media and communication applications.
Many of these applications are concurrent in the sense that multiple subsystems can be running simultaneously. Also, these applications are so dynamic at run-time that the designs based on the worst case execution times are inefficient in terms of resource allocation (e.g., energy budgets). A novel systematical approach is clearly necessary in the area of system-level design for the embedded systems where those concurrent and dynamic applications are mapped. This material is mainly based on research at IMEC and its international university network partners in this area in the period 1997-2006. In order to deal with the concurrent and dynamic behaviors in an energy-performance optimal way, we have adopted a hierarchical system model (i.e., the gray-box model) that can both exhibit the sufficient detail of the applications for design-time analysis and hide unnecessary detail for a low-overhead run-time management. We have also developed a well-balanced design-time/run-time combined task scheduling methodology to explore the trade-off space at design-time and efficiently handle the system adaptations at run-time. Moreover, we have identified the connection between task-level memory/communication management and task scheduling and illustrated how to perform the task-level memory/communication management in order to obtain the design constraints that enable the this connection. A fast approach is also shown to estimate at the system-level, the energy and performance characterization of applications executing on the target platform processors.

Written for:
Academia; senior embedded software design engineers (and their managers) in the digital signal processing industry

Keywords:

• Concurrent systems
• Embedded software
• Memory management
• Performance-energy trade-offs
• Task scheduling

[ 本帖最后由 benemale 于 2008-1-7 23:49 编辑 ]

sawfish

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uestc_xwd

强人啊！支持！

arsin

thank you

iyahsue

thanks very much

killerljj

very good！

yousee

都是新书，强

123451

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