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给位大神,对AEC-Q100中对于CDM边角Pin的定义不太理解,QFN, BGA封装到底有没有corner pin?
Corner pins are pins of an integrated circuit (IC) package that singularly have a higher probability of
contact with a grounded surface, based on their package pin geometry. The following leaded package
types are expected to have corner pins: Dual in Line (DIP, 4 corner pins), Small Outline Integrated Circuit
(SOIC, 4 corner pins), Quad Flat Pack (QFP, 8 corner pins), and Plastic Leaded Chip Carrier (PLCC, 8
corner pins). IC packages for which no pins or balls extend further in the X or Y direction than the
package housing, and / or are aligned in an array of equal distribution across a single package surface,
may be classified as not having corner pins. Due to the inherent design of the package, QFN (Quad Flat
Pack No Lead), WCSP (Wafer Chip Scale Packages) and Ball Grid Arrays (BGAs) with missing pins in
the actual corner pin locations do not have corner pins. BGA packages with specific corner pins in the pin
array corner are classified as having corner pins (see Figure 1). Engineering judgment shall be made to
determine if other packages have corner pins and which pins will be defined as corner pins.
BGA array with corner pin BGA array without corner pin
Figure 1: BGA package pin arrays with corner pin (left) and without corner pin (right)
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