CDL: Circuit Description Language is a kind of netlist, a description of an electronic circuit. It is usually automatically generated from a circuit schematic. It is used for electronic circuit simulation and layout versus schematic (LVS) checks. It is similar to SPICE netlists, but with some extensions.
----from Wikipedia
个人理解:CDL只描述了电路的拓扑结构,但是没有激励源。SPICE包含激励以及仿真设置部分。