为什么高压pin的ESD比低压pin还低？

limonstone2012

近期看了几篇关于fly-back芯片的datasheet，里面有个ESD的问题一直比较困惑！内容如下： ABSOLUTE MAXIMUM RATINGS HV to PGND..........................................................................................................-0.3V to 650V SRD to SGND..........................................................................................................-1V to 200V VCC to PGND..........................................................................................................-0.3V to 35V VDD to SGND..........................................................................................................-0.3V to 35V ESD capability human body model (except VCC,VDD,SRD and HV).......................................4.0kV ESD capability human body model (VCC,VDD).....................................................................3.5kV ESD capability human body model (SRD)............................................................................2.0kV ESD capability human body model (HV)..............................................................................800V 为何高压HV pin ESD反而更低？

acocacol

这个跟高压低压没关系吧，跟泄放器件的泄放能力有关

张2018

高压Pin的ESD模块需要高耐压，所以得牺牲导通电阻。