[招聘] 数字Implementation/DFT [成都-沐曦集成电路]

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内推邮箱：110699362@qq.com

职位：Implementation:
工作地点：成都高新区软件园
Job Responsibilities:
1. Responsible for Front-End chip implementation including design, implementation and ｅｘｅｃution of the flow that starts with RTL code and ends with the ｄｅｌivery of a ｎｅｔlist package ready for physical design.
2. Responsible for ASIC design methodology and flow development, interfacing with EDA vendors on technology.

Job Requirements:
1. Familiar with Verilog RTL design and has experience of large digital ASIC project.
2. Familiar with front-end EDA tools and flows (Design compiler, PrimeTime, Conformal,Verde)
3. Familiar with unix/linux and ｓｃｒｉｐｔs (tcl, perl etc.)
4. Fluent English on talking, presentation and writing documents.
5. Strong sense of task scheduling and ｄｅｌiver on time as predetermined milestones committed to manager.

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职位：DFT
工作地点：成都高新区软件园
Job Responsibilities:
1. Lead SoC level DFT architecture definition
2. Block and SoC level DFT implementation, including SCAN, MBIST, RTL integration, STA, etc.
3. Plan/Implement block/chip level DFT RTL designs basing on FloorPlan
4. MBIST chip level plan, RTL ｉｎｓｅｒｔion, verification and pattern generation
5. Develop high coverage and cost effective test patterns, and take part in ATE bring-up
6. Co-work with Front End and PD for synthesis optimization and smooth timing signoff

Job Requirements:
1. ｍａｓｔｅｒ Degree in electrical engineering with 10+ years of digital circuit design and logic design experience; Or Bachelor Degree with 13+ years related working experience
2. Expertise with JTAG/IEEE1500, SCAN, MBIST, RTL design, STA, DV
3. Expertise with EDA tools, and has basic knowledge of state of the art test strategies
4. Expertise with Programming and ｓｃｒｉｐｔing skills in Perl or Tcl
5. Good communication skills (both English and Mandarin) and self-driven, willing to learn/share

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