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IC猎头 微信361261541
以下是多家公司的职位 薪水视年限等因素而定 可以open
3年左右经验的人选也可以
DFT设计专家/高级专家-上海 北京 成都--BAT大厂
岗位描述
The candidate is expected to be responsible for following tasks:
- Participate in complex Chip DFT/DFD feature and architecture definition
- Implement DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic
- Generate DFT related timing constraints and work for timing closure
- Develop and verify high coverage and cost effective test patterns for the production test
- Design, implement and verify other DFX (debug, characterization, yield etc) feature
- Evaluate and establish the advanced DFT/DFD tools and flow
岗位要求
6+ years for Bachelor or 3+ years for master degree experience in DFT design and verification, test pattern development
KEY KNOWLEDGE, SKILLS AND ABBILITIES REQUIRED
- Good Knowledge of Scan/ATPG, MBIST and boundary scan and other DFT techniques
- Good Knowledge of industry DFT tools like DFTMax, TetraMax ,TestKompress, FastScan, Tessent Mbist, SMS etc
- Good knowledge of digital SoC/ASIC design, including STA, verification and RTL coding
- Proficient in hardware description languages such as Verilog, System Verilog and VHDL
- Good Knowledge of script language, such as Tcl, Python, Perl
- Good English hearing, speaking, reading and writing capabilities
- Strong commitment to schedule and work quality, good team player
芯片DFT工程师 上海北京-
职位描述
1、负责SoC芯片中的DFT相关工作,包括Scan,MBIST,ATPG,Boundary Scan等等;
2、和其他团队合作,完成芯片设计过程中相关的Timing/Power-IR分析和收敛;
3、流片后进行ATE测试,包括向量调试,覆盖率优化,解决测试中遇到的各种问题。
职位要求
1、硕士学位及以上,微电子/电子/计算机等相关专业毕业,2年以上DFT工作经验;
2、具备熟练的脚本技能(例如TCL,Perl,Python等) ;
3、熟练使用DFT EDA工具,掌握DFT原理和方法;
4、熟悉综合/STA者优先;
DFT Senior Engineer--大厂投资 已流片
Job Requirements:
-At least 5+ years experiences in DFT;
-Hand on experience of SoC DFT plan definition,Scan Compression logic/MBIST logic/Boundary scan chain insertion, pattern bring up and diagnose;
-Familiar with the Mentor or Synopsys tool flow;
-A high-level of self-motivation and a proactive approach to solving problems.
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