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本帖最后由 ZHZIC 于 2020-8-20 10:30 编辑
设置好LVS和PEX的时候,都出现了同样的问题:Schematic export failed or was cancelled. Please consult the transcript in the viewer window
然后我去CIW窗口去看了一下,是这样的:Loading Working place Display File '/home/IC/Desktop/cadence/project/tsmc18/display.drf'
ERROR (OSSHNL-116): Unable to descend into any of the views defined in the view list, 'cdl schematic', for the instance 'C1' in cell 'BGCVS_3'. Add one of these views to the cell 'mimcap_2p0_sin' in the library 'tsmc18', or modify the view list so that it contains an existing view.
End netlisting Aug 19 20:06:47 2020
ERROR (OSSHNL-514): Netlist generation failed because of the errors reported above. The netlist might not have been generated at all, or the generated netlist could be corrupt. Fix the reported errors and regenerate the netlist.
我换了好几个电路试了都不行,最后简单画了个反相器,都是同样的问题。
本来挺好的,然后我就退出了cadence,再进cadence做LVS和PEX的时候就这样了。。。
谁知道怎么解决呀
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