FFT实现参考文献

weed637

这是我去年做FFT时的文献了，希望能给大家一些提示了。
[1] J.W. Cooley, J.W. Tukey, An algorithm for the machine computation of complex Fourier series. Mathematics of Computation, 1965, 19(4):297-301.
[2] L. G. Johnson, “Conflict free memory addressing for dedicated FFT hardware,” IEEE Trans. Circuits Syst. II, vol. 39, pp.312–316, May 1992.
[3] S. Magar, S. Shen, G. Luikuo, M. Fleming, and R. Aguilar, “An application specific dsp chip set for 100 MHz data rates,” in Proc. Int. Conf. Acoustics, Speech, and Signal Processing, Apr. 1988, vol. 4, pp. 1989–1992.
[4] “LH9124 digital signal processor user’s guide,” Sharp, Camas, WA, 1992.
[5] P. A. Ruetz and M. M. Cai, “A real time FFT chip set: Architectural issues,” in Proc. Int. Conf. Pattern Recognition, June 1990, vol. 2, pp.385–388.
[6] S. He and M. Torkelson, “Design and implementation of a 1024-point pipeline FFT processor.” in Proc. IEEE Custom Integrated Circuits Conf., May 1998, pp.131–134.
[7] E. Bidet, D. Castelain, C. Joanblanq, and P. Senn, “A fast single chip implementation of 8192 complex point FFT,” IEEE J. Solid-State Circuits, vol. 30, pp. 300–305, Mar. 1995.
[8] G. Sunada, J. Jin, M. Berzins, and T. Chen, “Cobra: An [sic] 1.2million transistor expandable column FFT chip,” in Proc. IEEE Int. Conf. Computer Design, Oct. 1994, pp. 546–550.
[9] J. O’Brien, J. Mather, and B. Holland, “A 200 mips single-chip 1k FFT processor,” in Proc. IEEE Int. Solid-State Circuits Conf., 1989, vol. 36, pp.166–167, 327.
[10] M. C. Pease, “Organization of large scale fourier processors,” J. Assoc. Comput. Mach., vol. 16, pp. 474–482, July 1969.
[11] D. Cohen, “Simplified control of FFT hardware,” IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-24, pp. 577–579, Dec. 1976.
[12] H.F. Lo, M.D. Shieh and C.M. Wu, “Design of an efficient FFT processor for DAB system.” IEEE International symposium on circuits and system, Vol. 4, pp. 654-657, 2001.
[13] Y.T. Ma, “An efficient memory addressing scheme for FFT processors.” IEEE Trans. Signal Processing, Vol.47, No.3, pp.907-911, 1999.
[14] “Fast Fourier Transform. V2.0 Product Specification,” Xilinx Logic Core, 2003.
[15] R. Radhouane, P. Liu and C.Modlin, “Minizing the memory requirement for continuous flow FFT implementation: continuous flow mixed FFT (CFMM-FFT)”, IEEE International Symposium on Circuits and Systems, May 28-31, 2000.
[16] C.P. Hung, S.G. Chen and K.L. Chen, “Design of an efficient variable-length FFT processor”, IEEE International Symposium on Circuits and Systems, Vol. 2,  May 23-26 2004.
[17] B.G. Jo and M.H. Sunwoo, “New continuous-flow mixed-radix (CFMR) FFT processor using novel in-place strategy,” IEEE Trans. Circuits Syst. I, Vol. 52, No.5, pp.911-919, 2005.
[18] Y.T. Zhao, A.T. Erdogan and T. Arslan, “A low-power domain-specific reconfigurable FFT fabric for system-on-chip applications.” IEEE International Parallel and Distributed Processing Symposium, 2005.
[19] Wilton S.J.E., “Embedded memory in FPGAs: recent research results,” Communications, Computers and Signal Processing, 1999 IEEE Pacific Rim Conference, 22-24 Aug. 1999, pp. 292 – 296.
[20] U. M. Baese, 数字信号处理的FPGA实现. 北京：清华大学出版社，2003.178～215.
[21] G. P. Zhang, F. Chen, “Parallel FFT CORDIC for Ultra wide band,” IEEE International Symposium on Personal, Indoor and Mobile Radio Communications, 5-8 Sept. 2004 Page(s): 1173 - 1177 Vol.2.
[22] R. Andraka, “A survey of CORDIC algorithms for FPGA based computes,” Proc. of the 1998 CM/SIGDA Sixth International Symposium on FPGAs,february,Monterey,CA,1998:191-200.
[23] C.H. Lin, A.Y. Wu, “Mixed-Scaling-Rotation CORDIC (MSR-CORDIC) algorithm and architecture for high-performance vector rotational DSP applications,” IEEE Trans. Circuits and Systems I, Vol. 52, No. 11, pp.2385-2396, 2005.
[24] J.C. Kuo, C.H. Wen, C.H. Lin, and A.Y. Wu, “VLSI Design of a variable-length FFT/IFFT processor for OFDM-based communication systems,” EURASIP Journal on Applied Signal Processing, No.13, pp.1306-1316, 2003.
[25] G.C. Zhong, F. Xu, and A.N. Willson, “A power-scalable reconfigurable FFT/IFFT IC based on a multi-processor ring,” IEEE Trans. Solid-State Circuits, Vol. 41, No. 2, pp. 483-495, 2006.
[26]  J.T. Arbaugh, “Table look-up CORDIC: efficient rotation through angle partitioning,”  Ph.D. dissertation,  Univ. Texas, Austin, 2004.
[27] D. Fu, “Efficient synchronization architectures for multimedia communications,” Ph.D. dissertation, Univ. California, Los Angles, 2000.
[28] D. Elam, C. Iovescu, “A block floating point implementation for an N-point FFT on the TMS320C55x DSP”, TI application report, September, 2003.
[29] XILINX, “Fast Fourier Transform. v3.2”, XILINX product specification, august, 2005.
[30] A.V. Oppenheim, R.W. Schafer, 离散时间信号处理（第二版）, 西安交通大学出版社, 2001

weed637

hehe 看来做这一块的人不多哈。

gaobin0628

传上来就好了

xxxevery

哎，英文的就看不懂了

xhwsll

求资料

star00100

请教楼主一个问题， 每级蝶型计算后，怎么对输出数据的位数处理呢？ 是定标还是用块浮点做的？

bihumanbu123

好，支持一下！