report_clock -generated
This command shows what the tools accepts as valid generated clock.
create_generated_clock -source mclk -edges {2 3 4} -name clkb [get_pins {U1/clkb U2/sd_clk}]Normally if you instantiate a clock inverter, you don't need to apply create_generated_clock for the inverted clock.
create_generated_clock -source U1/clkb -edges {2 4 6} -name clk_div2 [get_pins {U1/clk_div2 U2/sd_clk_div2}]
This statement is a bit odd.
Assume you have a counter div_cnt_r[2:0] running off mclk that generates the div2, div4, div8 clocks.
The source pin is the CK pin of the flop driving the divided clock.
create_generated_clock -name clk_div2 -source div_cnt_r_reg[0]/CK -edges [1 3 5] -master_clock [get_clocks mclk] [get_pins div_cnt_r_reg[0]/Q]
The tool needs to be able to trace from the root of the generated clock, div_cnt_r_reg[0]/Q, to its source to check the the phase relationship.
Tools may not be able to trace to hierarchical pin such as "U1/clkb".
Similarly, other generated clocks can be defined.
create_generated_clock -name clk_div4 -source div_cnt_r_reg[1]/CK -edges [1 5 9] -master_clock [get_clocks mclk] [get_pins div_cnt_r_reg[1]/Q]
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发表于 2020-1-3 01:17:59
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